Searched hist:142570 (Results 1 - 11 of 11) sorted by relevance
| /freebsd-11.0-release/sys/arm/xscale/ | ||
| H A D | std.xscale | 142570 Sat Feb 26 18:59:01 MST 2005 cognet Instead of using sysarch() to store-retrieve the tp, add a magic address, ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache line will be allocated and locked for this address, so that it will never go to RAM. On CPUs that does not, a page is allocated for it (it will be a bit slower, and is wrong for SMP, but should be fine for UP). The tp is still stored in the mdthread struct, and at each context switch, ARM_TP_ADDRESS gets updated. Suggested by: davidxu |
| /freebsd-11.0-release/sys/arm/arm/ | ||
| H A D | cpufunc_asm.S | diff 142570 Sat Feb 26 18:59:01 MST 2005 cognet Instead of using sysarch() to store-retrieve the tp, add a magic address, ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache line will be allocated and locked for this address, so that it will never go to RAM. On CPUs that does not, a page is allocated for it (it will be a bit slower, and is wrong for SMP, but should be fine for UP). The tp is still stored in the mdthread struct, and at each context switch, ARM_TP_ADDRESS gets updated. Suggested by: davidxu |
| H A D | genassym.c | diff 142570 Sat Feb 26 18:59:01 MST 2005 cognet Instead of using sysarch() to store-retrieve the tp, add a magic address, ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache line will be allocated and locked for this address, so that it will never go to RAM. On CPUs that does not, a page is allocated for it (it will be a bit slower, and is wrong for SMP, but should be fine for UP). The tp is still stored in the mdthread struct, and at each context switch, ARM_TP_ADDRESS gets updated. Suggested by: davidxu |
| H A D | swtch-v4.S | diff 142570 Sat Feb 26 18:59:01 MST 2005 cognet Instead of using sysarch() to store-retrieve the tp, add a magic address, ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache line will be allocated and locked for this address, so that it will never go to RAM. On CPUs that does not, a page is allocated for it (it will be a bit slower, and is wrong for SMP, but should be fine for UP). The tp is still stored in the mdthread struct, and at each context switch, ARM_TP_ADDRESS gets updated. Suggested by: davidxu |
| H A D | swtch-v6.S | diff 142570 Sat Feb 26 18:59:01 MST 2005 cognet Instead of using sysarch() to store-retrieve the tp, add a magic address, ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache line will be allocated and locked for this address, so that it will never go to RAM. On CPUs that does not, a page is allocated for it (it will be a bit slower, and is wrong for SMP, but should be fine for UP). The tp is still stored in the mdthread struct, and at each context switch, ARM_TP_ADDRESS gets updated. Suggested by: davidxu |
| H A D | swtch.S | diff 142570 Sat Feb 26 18:59:01 MST 2005 cognet Instead of using sysarch() to store-retrieve the tp, add a magic address, ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache line will be allocated and locked for this address, so that it will never go to RAM. On CPUs that does not, a page is allocated for it (it will be a bit slower, and is wrong for SMP, but should be fine for UP). The tp is still stored in the mdthread struct, and at each context switch, ARM_TP_ADDRESS gets updated. Suggested by: davidxu |
| H A D | machdep.c | diff 142570 Sat Feb 26 18:59:01 MST 2005 cognet Instead of using sysarch() to store-retrieve the tp, add a magic address, ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache line will be allocated and locked for this address, so that it will never go to RAM. On CPUs that does not, a page is allocated for it (it will be a bit slower, and is wrong for SMP, but should be fine for UP). The tp is still stored in the mdthread struct, and at each context switch, ARM_TP_ADDRESS gets updated. Suggested by: davidxu |
| H A D | pmap-v4.c | diff 142570 Sat Feb 26 18:59:01 MST 2005 cognet Instead of using sysarch() to store-retrieve the tp, add a magic address, ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache line will be allocated and locked for this address, so that it will never go to RAM. On CPUs that does not, a page is allocated for it (it will be a bit slower, and is wrong for SMP, but should be fine for UP). The tp is still stored in the mdthread struct, and at each context switch, ARM_TP_ADDRESS gets updated. Suggested by: davidxu |
| /freebsd-11.0-release/sys/arm/include/ | ||
| H A D | sysarch.h | diff 142570 Sat Feb 26 18:59:01 MST 2005 cognet Instead of using sysarch() to store-retrieve the tp, add a magic address, ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache line will be allocated and locked for this address, so that it will never go to RAM. On CPUs that does not, a page is allocated for it (it will be a bit slower, and is wrong for SMP, but should be fine for UP). The tp is still stored in the mdthread struct, and at each context switch, ARM_TP_ADDRESS gets updated. Suggested by: davidxu |
| H A D | machdep.h | diff 142570 Sat Feb 26 18:59:01 MST 2005 cognet Instead of using sysarch() to store-retrieve the tp, add a magic address, ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache line will be allocated and locked for this address, so that it will never go to RAM. On CPUs that does not, a page is allocated for it (it will be a bit slower, and is wrong for SMP, but should be fine for UP). The tp is still stored in the mdthread struct, and at each context switch, ARM_TP_ADDRESS gets updated. Suggested by: davidxu |
| H A D | pmap-v4.h | diff 142570 Sat Feb 26 18:59:01 MST 2005 cognet Instead of using sysarch() to store-retrieve the tp, add a magic address, ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache line will be allocated and locked for this address, so that it will never go to RAM. On CPUs that does not, a page is allocated for it (it will be a bit slower, and is wrong for SMP, but should be fine for UP). The tp is still stored in the mdthread struct, and at each context switch, ARM_TP_ADDRESS gets updated. Suggested by: davidxu |
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