| /freebsd-10.0-release/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMHazardRecognizer.h | 39 ARMHazardRecognizer(const InstrItineraryData *ItinData, const ARMBaseInstrInfo &tii, const ARMBaseRegisterInfo &tri, const ARMSubtarget &sti, const ScheduleDAG *DAG) argument
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| /freebsd-10.0-release/contrib/llvm/lib/CodeGen/ |
| H A D | RegisterCoalescer.h | 62 CoalescerPair(const TargetRegisterInfo &tri) argument
68 CoalescerPair(unsigned VirtReg, unsigned PhysReg, const TargetRegisterInfo &tri) argument
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| H A D | InterferenceCache.cpp | 25 init(MachineFunction *mf, LiveIntervalUnion *liuarray, SlotIndexes *indexes, LiveIntervals *lis, const TargetRegisterInfo *tri) argument
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| H A D | Spiller.cpp | 59 const TargetRegisterInfo *tri; member in class:__anon2232::SpillerBase
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| H A D | CalcSpillWeights.cpp | 112 const TargetRegisterInfo &tri = *MF.getTarget().getRegisterInfo(); local
59 copyHint(const MachineInstr *mi, unsigned reg, const TargetRegisterInfo &tri, const MachineRegisterInfo &mri) argument
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| H A D | LiveRangeEdit.cpp | 142 rematerializeAt(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, const Remat &RM, const TargetRegisterInfo &tri, bool Late) argument
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| H A D | RegAllocPBQP.cpp | 131 const TargetRegisterInfo *tri; member in class:__anon2203::RegAllocPBQP
196 const TargetRegisterInfo *tri = mf->getTarget().getRegisterInfo(); local
293 addInterferenceCosts( PBQP::Matrix &costMat, const PBQPRAProblem::AllowedSet &vr1Allowed, const PBQPRAProblem::AllowedSet &vr2Allowed, const TargetRegisterInfo *tri) argument
[all...] |
| H A D | RegisterPressure.cpp | 323 RegisterOperands(const TargetRegisterInfo *tri, argument
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| H A D | BranchFolding.cpp | 174 OptimizeFunction(MachineFunction &MF, const TargetInstrInfo *tii, const TargetRegisterInfo *tri, MachineModuleInfo *mmi) argument
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| H A D | RegisterCoalescer.cpp | 215 static bool isMoveInstr(const TargetRegisterInfo &tri, const MachineInstr *MI, argument
1326 JoinVals(LiveInterval &li, unsigned subIdx, SmallVectorImpl<VNInfo*> &newVNInfo, const CoalescerPair &cp, LiveIntervals *lis, const TargetRegisterInfo *tri) argument
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| H A D | MachineScheduler.cpp | 786 LoadClusterMutation(const TargetInstrInfo *tii, const TargetRegisterInfo *tri) argument
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| /freebsd-10.0-release/contrib/llvm/include/llvm/Target/ |
| H A D | TargetRegisterInfo.h | 880 PrintRegUnit(unsigned unit, const TargetRegisterInfo *tri) argument
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| /freebsd-10.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGRRList.cpp | 1769 RegReductionPriorityQueue(MachineFunction &mf, bool tracksrp, bool srcorder, const TargetInstrInfo *tii, const TargetRegisterInfo *tri, const TargetLowering *tli) argument
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| /freebsd-10.0-release/contrib/llvm/lib/Target/R600/ |
| H A D | AMDILCFGStructurizer.cpp | 322 prepare(FuncT &func, PassT &pass, const AMDGPURegisterInfo * tri) argument
389 run(FuncT &func, PassT &pass, const AMDGPURegisterInfo * tri) argument
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