Searched defs:simm13 (Results 1 - 5 of 5) sorted by relevance

/openjdk9/hotspot/src/cpu/sparc/vm/
H A DrelocInfo_sparc.cpp82 int simm13 = Assembler::low10((intptr_t)x) + o; local
H A Dc1_LIRAssembler_sparc.cpp1780 int simm13 = right->as_constant_ptr()->as_jint(); local
1842 int simm13 local
1852 int simm13 = (int)c; local
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/openjdk9/hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.asm.sparc/src/org/graalvm/compiler/asm/sparc/
H A DSPARCMacroAssembler.java136 public void cmp(Register rs1, int simm13) { argument
144 public void dec(int simm13, Register rd) { argument
168 public void mov(int simm13, Register rd) { argument
H A DSPARCAssembler.java889 private static final BitSpec simm13 = new ContinousBitSpec(12, 0, true, "simm13"); field in class:SPARCAssembler.BitSpec
1513 public static void emit(SPARCMacroAssembler masm, Op3s opcode, Register rs1, int simm13, Register rd) { argument
1829 protected void op3(Op3s op3, Register rs1, int simm13, Register rd) { argument
1894 public void add(Register rs1, int simm13, Registe argument
1902 addc(Register rs1, int simm13, Register rd) argument
1910 addcc(Register rs1, int simm13, Register rd) argument
1918 and(Register rs1, int simm13, Register rd) argument
1926 andcc(Register rs1, int simm13, Register rd) argument
1934 andn(Register rs1, int simm13, Register rd) argument
1942 andncc(Register rs1, int simm13, Register rd) argument
2174 jmpl(Register rs1, int simm13, Register rd) argument
2216 mulx(Register rs1, int simm13, Register rd) argument
2225 or(Register rs1, int simm13, Register rd) argument
2234 popc(int simm13, Register rd) argument
2266 save(Register rs1, int simm13, Register rd) argument
2274 sdivx(Register rs1, int simm13, Register rd) argument
2282 udivx(Register rs1, int simm13, Register rd) argument
2308 sra(Register rs1, int simm13, Register rd) argument
2325 srl(Register rs1, int simm13, Register rd) argument
2342 sub(Register rs1, int simm13, Register rd) argument
2350 subcc(Register rs1, int simm13, Register rd) argument
2377 wrccr(Register rs1, int simm13) argument
2385 xor(Register rs1, int simm13, Register rd) argument
2393 xorcc(Register rs1, int simm13, Register rd) argument
2401 xnor(Register rs1, int simm13, Register rd) argument
2615 patchAddImmediate(int position, int simm13) argument
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/openjdk9/hotspot/test/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/sparc/
H A DSPARCTestAssembler.java68 private void emitOp3(int op, Register rd, int op3, Register rs1, int simm13) { argument

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