Searched defs:pll5_cfg (Results 1 - 4 of 4) sorted by relevance
| /u-boot/arch/arm/include/asm/arch-sunxi/ | ||
| H A D | clock_sun8i_a83t.h | 25 u32 pll5_cfg; /* 0x20 pll5 ddr control */ member in struct:sunxi_ccm_reg |
| H A D | clock_sun4i.h | 22 u32 pll5_cfg; /* 0x20 pll5 control */ member in struct:sunxi_ccm_reg |
| H A D | clock_sun50i_h6.h | 19 u32 pll5_cfg; /* 0x010 pll5 (ddr) control */ member in struct:sunxi_ccm_reg |
| H A D | clock_sun6i.h | 22 u32 pll5_cfg; /* 0x20 pll5 control */ member in struct:sunxi_ccm_reg |
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