Searched defs:mmDP5_DP_DPHY_TRAINING_PATTERN_SEL (Results 1 - 8 of 8) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3391 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL 0x4BD1 macro
H A Ddce_8_0_d.h3883 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL 0x4bd1 macro
H A Ddce_11_2_d.h5727 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL 0x4fb0 macro
H A Ddce_11_0_d.h4495 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL 0x4fb0 macro
H A Ddce_10_0_d.h4515 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL 0x4fb0 macro
H A Ddce_12_0_offset.h11648 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL macro
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9931 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL 0x2618 macro
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H A Ddcn_2_0_0_offset.h12618 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL macro
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