| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 265 bool CheckImmRange(int immBits, int zeroBits, bool isSigned, argument
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Constants.cpp | 704 Constant *ConstantInt::get(Type *Ty, uint64_t V, bool isSigned) { argument
714 ConstantInt *ConstantInt::get(IntegerType *Ty, uint64_t V, bool isSigned) { argument
1712 Constant *ConstantExpr::getIntegerCast(Constant *C, Type *Ty, bool isSigned) { argument
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| H A D | Instructions.cpp | 3713 bool CmpInst::isSigned(Predicate predicate) { function in class:CmpInst
2903 CreateIntegerCast(Value *C, Type *Ty, bool isSigned, const Twine &Name, Instruction *InsertBefore) argument
2917 CreateIntegerCast(Value *C, Type *Ty, bool isSigned, const Twine &Name, BasicBlock *InsertAtEnd) argument
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 2938 bool isSigned = (opcode == ISD::SMULO); local
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 165 insertRangeTest(Value *V, const APInt &Lo, const APInt &Hi, bool isSigned, bool Inside) argument
[all...] |
| H A D | InstCombineCasts.cpp | 162 EvaluateInDifferentType(Value *V, Type *Ty, bool isSigned) argument
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| /freebsd-11-stable/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGExprCXX.cpp | 725 bool isSigned local
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| H A D | CGExprScalar.cpp | 3146 bool isSigned = Ops.Ty->isSignedIntegerOrEnumerationType(); local
3265 bool isSigned = indexOperand->getType()->isSignedIntegerOrEnumerationType(); local
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IRBuilder.h | 2170 Value *CreateIntCast(Value *V, Type *DestTy, bool isSigned, argument
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 4162 unsigned isSigned = (F >> HexagonII::ExtentSignedPos) local
4224 unsigned isSigned = (F >> HexagonII::ExtentSignedPos) local
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 2819 bool ARMDAGToDAGISel::tryV6T2BitfieldExtractOp(SDNode *N, bool isSigned) { argument
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| H A D | ARMISelLowering.cpp | 13709 bool isSigned = N->getOpcode() == ISD::FP_TO_SINT; local
13767 bool isSigned = OpOpcode == ISD::SINT_TO_FP; local
16196 bool isSigned local
8361 isExtendedBUILD_VECTOR(SDNode *N, SelectionDAG &DAG, bool isSigned) argument
16214 bool isSigned = N->getOpcode() == ISD::SDIVREM || local
16240 bool isSigned = (Opcode == ISD::SDIVREM); local
16315 bool isSigned = N->getOpcode() == ISD::SREM; local
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 4775 bool isSigned = Opcode == ISD::SMUL_LOHI; local
4866 bool isSigned = Opcode == ISD::SDIVREM; local
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 3382 bool isSigned; local
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| H A D | DAGCombiner.cpp | 3607 static bool isDivRemLibcallAvailable(SDNode *Node, bool isSigned, argument
3631 bool isSigned = (Opcode == ISD::SDIV) || (Opcode == ISD::SREM); local
3994 bool isSigned = (Opcode == ISD::SREM); local
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2771 isExtendedBUILD_VECTOR(SDNode *N, SelectionDAG &DAG, bool isSigned) argument
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| /freebsd-11-stable/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaExpr.cpp | 3656 bool isSigned = !Literal.isUnsigned; local
|