| /u-boot/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_init.c | 117 u32 cs_num; local
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| H A D | ddr3_training_pbs.c | 48 u32 pup = 0, bit = 0, if_id = 0, all_lock = 0, cs_num = 0; local
940 int ddr3_tip_print_pbs_result(u32 dev_num, u32 cs_num, enum pbs_dir pbs_mode) argument
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| H A D | ddr3_training_hw_algo.c | 45 u32 cs_num = 0, max_read_sample = 0, min_read_sample = 0x1f; local
117 u32 cs_num; local
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| H A D | mv_ddr_topology.c | 209 unsigned int cs_num = 0; local
320 unsigned int cs_num = mv_ddr_cs_num_get(); local
337 unsigned int cs_num = mv_ddr_cs_num_get(); local
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| H A D | mv_ddr4_mpr_pda_if.c | 629 int mv_ddr4_pda_ctrl(u8 dev_num, u8 if_id, u8 cs_num, int enable) argument
572 mv_ddr4_pda_pattern_odpg_load(u32 dev_num, enum hws_access_type access_type, u32 if_id, u32 subphy_mask, u32 cs_num) argument
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| H A D | ddr3_training_bist.c | 20 ddr3_tip_bist_activate(u32 dev_num, enum hws_pattern pattern, enum hws_access_type access_type, u32 if_num, enum hws_dir dir, enum hws_stress_jump addr_stress_jump, enum hws_pattern_duration duration, enum hws_bist_operation oper_type, u32 offset, u32 cs_num, u32 pattern_addr_length) argument
118 hws_ddr3_run_bist(u32 dev_num, enum hws_pattern pattern, u32 *result, u32 cs_num) argument
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| H A D | ddr3_training_ip.h | 129 u8 cs_num; member in struct:cs_element
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| H A D | ddr3_training_ip_engine.c | 473 ddr3_tip_ip_training(u32 dev_num, enum hws_access_type access_type, u32 interface_num, enum hws_access_type pup_access_type, u32 pup_num, enum hws_training_result result_type, enum hws_control_element control_element, enum hws_search_dir search_dir, enum hws_dir direction, u32 interface_mask, u32 init_value, u32 num_iter, enum hws_pattern pattern, enum hws_edge_compare edge_comp, enum hws_ddr_cs cs_type, u32 cs_num, enum hws_training_ip_stat *train_status) argument
766 ddr3_tip_configure_odpg(u32 dev_num, enum hws_access_type access_type, u32 if_id, enum hws_dir direction, u32 tx_phases, u32 tx_burst_size, u32 rx_phases, u32 delay_between_burst, u32 rd_mode, u32 cs_num, u32 addr_stress_jump, u32 single_pattern) argument
1103 ddr3_tip_ip_training_wrapper_int(u32 dev_num, enum hws_access_type access_type, u32 if_id, enum hws_access_type pup_access_type, u32 pup_num, u32 bit_num, enum hws_training_result result_type, enum hws_control_element control_element, enum hws_search_dir search_dir, enum hws_dir direction, u32 interface_mask, u32 init_value_l2h, u32 init_value_h2l, u32 num_iter, enum hws_pattern pattern, enum hws_edge_compare edge_comp, enum hws_ddr_cs train_cs_type, u32 cs_num, enum hws_training_ip_stat *train_status) argument
1242 ddr3_tip_ip_training_wrapper(u32 dev_num, enum hws_access_type access_type, u32 if_id, enum hws_access_type pup_access_type, u32 pup_num, enum hws_training_result result_type, enum hws_control_element control_element, enum hws_search_dir search_dir, enum hws_dir direction, u32 interface_mask, u32 init_value_l2h, u32 init_value_h2l, u32 num_iter, enum hws_pattern pattern, enum hws_edge_compare edge_comp, enum hws_ddr_cs train_cs_type, u32 cs_num, enum hws_training_ip_stat *train_status) argument
[all...] |
| H A D | ddr3_training.c | 300 int ddr3_tip_configure_cs(u32 dev_num, u32 if_id, u32 cs_num, u32 enable) argument
365 u32 cs_num; local
1241 u32 cs_num; local
1891 u32 if_id, bus_num, cs_bitmask, data_val, cs_num; local
3002 unsigned int cs_num = mv_ddr_cs_num_get(); local
3017 unsigned int cs_num = mv_ddr_cs_num_get(); local
[all...] |
| /u-boot/drivers/spi/ |
| H A D | mscc_bb_spi.c | 23 int cs_num; member in struct:mscc_bb_priv
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| /u-boot/arch/arm/mach-sunxi/ |
| H A D | dram_suniv.c | 46 u32 cs_num; /* dram chip count 1: one chip 2: two chip */ member in struct:dram_para
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| /u-boot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_sdram.c | 494 u32 chan, byte_count, cs_num, byte; local
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| H A D | ddr3_spd.c | 593 u32 cs, cl, cs_num, cs_ena; local
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| /u-boot/drivers/memory/ |
| H A D | ti-gpmc.c | 35 u32 cs_num; member in struct:ti_gpmc
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| /u-boot/drivers/ram/rockchip/ |
| H A D | sdram_rv1126.c | 1968 init_rw_trn_result_struct(struct rw_trn_result *result, void __iomem *phy_base, u8 cs_num) argument
2010 save_rw_trn_deskew(void __iomem *phy_base, struct fsp_rw_trn_result *result, u8 cs_num, int min_val, bool rw) argument
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