Searched defs:XCHAL_HAVE_BE (Results 1 - 9 of 9) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/include/
H A Dxtensa-config.h28 #undef XCHAL_HAVE_BE macro
29 #define XCHAL_HAVE_BE 1 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/include/
H A Dxtensa-config.h28 #undef XCHAL_HAVE_BE macro
29 #define XCHAL_HAVE_BE 1 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/include/
H A Dxtensa-config.h28 #undef XCHAL_HAVE_BE macro
29 #define XCHAL_HAVE_BE 1 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/xtensa/variants/fsf/include/variant/
H A Dcore.h29 #define XCHAL_HAVE_BE 1 /* big-endian byte ordering */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/xtensa/variants/fsf/include/variant/
H A Dcore.h29 #define XCHAL_HAVE_BE 1 /* big-endian byte ordering */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/xtensa/variants/dc232b/include/variant/
H A Dcore.h29 #define XCHAL_HAVE_BE 0 /* big-endian byte ordering */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/xtensa/variants/s6000/include/variant/
H A Dcore.h29 #define XCHAL_HAVE_BE 0 /* big-endian byte ordering */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/xtensa/variants/dc232b/include/variant/
H A Dcore.h29 #define XCHAL_HAVE_BE 0 /* big-endian byte ordering */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/xtensa/variants/s6000/include/variant/
H A Dcore.h29 #define XCHAL_HAVE_BE 0 /* big-endian byte ordering */ macro

Completed in 182 milliseconds