Searched defs:XCHAL_DCACHE_LINEWIDTH (Results 1 - 3 of 3) sorted by relevance

/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A Dcore.h141 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro
/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h122 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro
/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h189 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro

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