| /linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| H A D | display_mode_vba_21.c | 6105 CalculateExtraLatency( double UrgentRoundTripAndOutOfOrderLatency, int TotalNumberOfActiveDPP, int PixelChunkSizeInKByte, int TotalNumberOfDCCActiveDPP, int MetaChunkSize, double ReturnBW, bool GPUVMEnable, bool HostVMEnable, int NumberOfActivePlanes, int NumberOfDPP[], int dpte_group_bytes[], double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData, double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly, int HostVMMaxPageTableLevels, int HostVMCachedPageTableLevels) argument
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| /linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_mode_vba_30.c | 6396 CalculateExtraLatency( long RoundTripPingLatencyCycles, long ReorderingBytes, double DCFCLK, int TotalNumberOfActiveDPP, int PixelChunkSizeInKByte, int TotalNumberOfDCCActiveDPP, int MetaChunkSize, double ReturnBW, bool GPUVMEnable, bool HostVMEnable, int NumberOfActivePlanes, int NumberOfDPP[], int dpte_group_bytes[], double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData, double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly, double HostVMMinPageSize, int HostVMMaxNonCachedPageTableLevels) argument
6435 CalculateExtraLatencyBytes( long ReorderingBytes, int TotalNumberOfActiveDPP, int PixelChunkSizeInKByte, int TotalNumberOfDCCActiveDPP, int MetaChunkSize, bool GPUVMEnable, bool HostVMEnable, int NumberOfActivePlanes, int NumberOfDPP[], int dpte_group_bytes[], double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData, double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly, double HostVMMinPageSize, int HostVMMaxNonCachedPageTableLevels) argument
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | display_mode_vba_util_32.c | 2919 dml32_UseMinimumDCFCLK( enum dm_use_mall_for_pstate_change_mode UseMALLForPStateChange[], bool DRRDisplay[], bool SynchronizeDRRDisplaysForUCLKPStateChangeFinal, unsigned int MaxInterDCNTileRepeaters, unsigned int MaxPrefetchMode, double DRAMClockChangeLatencyFinal, double FCLKChangeLatency, double SREnterPlusExitTime, unsigned int ReturnBusWidth, unsigned int RoundTripPingLatencyCycles, unsigned int ReorderingBytes, unsigned int PixelChunkSizeInKByte, unsigned int MetaChunkSize, bool GPUVMEnable, unsigned int GPUVMMaxPageTableLevels, bool HostVMEnable, unsigned int NumberOfActiveSurfaces, double HostVMMinPageSize, unsigned int HostVMMaxNonCachedPageTableLevels, bool DynamicMetadataVMEnabled, bool ImmediateFlipRequirement, bool ProgressiveToInterlaceUnitInOPP, double MaxAveragePercentOfIdealSDPPortBWDisplayCanUseInNormalSystemOperation, double PercentOfIdealSDPPortBWReceivedAfterUrgLatency, unsigned int VTotal[], unsigned int VActive[], unsigned int DynamicMetadataTransmittedBytes[], unsigned int DynamicMetadataLinesBeforeActiveRequired[], bool Interlace[], double RequiredDPPCLKPerSurface[][2][DC__NUM_DPP__MAX], double RequiredDISPCLK[][2], double UrgLatency[], unsigned int NoOfDPP[][2][DC__NUM_DPP__MAX], double ProjectedDCFClkDeepSleep[][2], double MaximumVStartup[][2][DC__NUM_DPP__MAX], unsigned int TotalNumberOfActiveDPP[][2], unsigned int TotalNumberOfDCCActiveDPP[][2], unsigned int dpte_group_bytes[], double PrefetchLinesY[][2][DC__NUM_DPP__MAX], double PrefetchLinesC[][2][DC__NUM_DPP__MAX], unsigned int swath_width_luma_ub_all_states[][2][DC__NUM_DPP__MAX], unsigned int swath_width_chroma_ub_all_states[][2][DC__NUM_DPP__MAX], unsigned int BytePerPixelY[], unsigned int BytePerPixelC[], unsigned int HTotal[], double PixelClock[], double PDEAndMetaPTEBytesPerFrame[][2][DC__NUM_DPP__MAX], double DPTEBytesPerRow[][2][DC__NUM_DPP__MAX], double MetaRowBytes[][2][DC__NUM_DPP__MAX], bool DynamicMetadataEnable[], double ReadBandwidthLuma[], double ReadBandwidthChroma[], double DCFCLKPerState[], double DCFCLKState[][2]) argument
3148 dml32_CalculateExtraLatencyBytes(unsigned int ReorderingBytes, unsigned int TotalNumberOfActiveDPP, unsigned int PixelChunkSizeInKByte, unsigned int TotalNumberOfDCCActiveDPP, unsigned int MetaChunkSize, bool GPUVMEnable, bool HostVMEnable, unsigned int NumberOfActiveSurfaces, unsigned int NumberOfDPP[], unsigned int dpte_group_bytes[], double HostVMInefficiencyFactor, double HostVMMinPageSize, unsigned int HostVMMaxNonCachedPageTableLevels) argument
3346 dml32_CalculateExtraLatency( unsigned int RoundTripPingLatencyCycles, unsigned int ReorderingBytes, double DCFCLK, unsigned int TotalNumberOfActiveDPP, unsigned int PixelChunkSizeInKByte, unsigned int TotalNumberOfDCCActiveDPP, unsigned int MetaChunkSize, double ReturnBW, bool GPUVMEnable, bool HostVMEnable, unsigned int NumberOfActiveSurfaces, unsigned int NumberOfDPP[], unsigned int dpte_group_bytes[], double HostVMInefficiencyFactor, double HostVMMinPageSize, unsigned int HostVMMaxNonCachedPageTableLevels) argument
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| /linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | display_mode_vba_31.c | 6929 CalculateExtraLatency( int RoundTripPingLatencyCycles, int ReorderingBytes, double DCFCLK, int TotalNumberOfActiveDPP, int PixelChunkSizeInKByte, int TotalNumberOfDCCActiveDPP, int MetaChunkSize, double ReturnBW, bool GPUVMEnable, bool HostVMEnable, int NumberOfActivePlanes, int NumberOfDPP[], int dpte_group_bytes[], double HostVMInefficiencyFactor, double HostVMMinPageSize, int HostVMMaxNonCachedPageTableLevels) argument
6978 CalculateExtraLatencyBytes( int ReorderingBytes, int TotalNumberOfActiveDPP, int PixelChunkSizeInKByte, int TotalNumberOfDCCActiveDPP, int MetaChunkSize, bool GPUVMEnable, bool HostVMEnable, int NumberOfActivePlanes, int NumberOfDPP[], int dpte_group_bytes[], double HostVMInefficiencyFactor, double HostVMMinPageSize, int HostVMMaxNonCachedPageTableLevels) argument
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | display_mode_vba_314.c | 7022 CalculateExtraLatency( int RoundTripPingLatencyCycles, int ReorderingBytes, double DCFCLK, int TotalNumberOfActiveDPP, int PixelChunkSizeInKByte, int TotalNumberOfDCCActiveDPP, int MetaChunkSize, double ReturnBW, bool GPUVMEnable, bool HostVMEnable, int NumberOfActivePlanes, int NumberOfDPP[], int dpte_group_bytes[], double HostVMInefficiencyFactor, double HostVMMinPageSize, int HostVMMaxNonCachedPageTableLevels) argument
7071 CalculateExtraLatencyBytes( int ReorderingBytes, int TotalNumberOfActiveDPP, int PixelChunkSizeInKByte, int TotalNumberOfDCCActiveDPP, int MetaChunkSize, bool GPUVMEnable, bool HostVMEnable, int NumberOfActivePlanes, int NumberOfDPP[], int dpte_group_bytes[], double HostVMInefficiencyFactor, double HostVMMinPageSize, int HostVMMaxNonCachedPageTableLevels) argument
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/dml2/ |
| H A D | display_mode_core.c | 4459 CalculateExtraLatency( dml_uint_t RoundTripPingLatencyCycles, dml_uint_t ReorderingBytes, dml_float_t DCFCLK, dml_uint_t TotalNumberOfActiveDPP, dml_uint_t PixelChunkSizeInKByte, dml_uint_t TotalNumberOfDCCActiveDPP, dml_uint_t MetaChunkSize, dml_float_t ReturnBW, dml_bool_t GPUVMEnable, dml_bool_t HostVMEnable, dml_uint_t NumberOfActiveSurfaces, dml_uint_t NumberOfDPP[], dml_uint_t dpte_group_bytes[], dml_float_t HostVMInefficiencyFactor, dml_uint_t HostVMMinPageSize, dml_uint_t HostVMMaxNonCachedPageTableLevels) argument
4529 CalculateExtraLatencyBytes(dml_uint_t ReorderingBytes, dml_uint_t TotalNumberOfActiveDPP, dml_uint_t PixelChunkSizeInKByte, dml_uint_t TotalNumberOfDCCActiveDPP, dml_uint_t MetaChunkSize, dml_bool_t GPUVMEnable, dml_bool_t HostVMEnable, dml_uint_t NumberOfActiveSurfaces, dml_uint_t NumberOfDPP[], dml_uint_t dpte_group_bytes[], dml_float_t HostVMInefficiencyFactor, dml_uint_t HostVMMinPageSize, dml_uint_t HostVMMaxNonCachedPageTableLevels) argument
[all...] |
| H A D | display_mode_core_structs.h | 940 dml_uint_t TotalNumberOfDCCActiveDPP[2]; member in struct:mode_support_st
1249 dml_uint_t *TotalNumberOfDCCActiveDPP; member in struct:UseMinimumDCFCLK_params_st
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| /linux-master/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_vba.h | 763 unsigned int TotalNumberOfDCCActiveDPP[DC__VOLTAGE_STATES][2]; member in struct:vba_vars_st
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