Searched defs:ToReg (Results 1 - 10 of 10) sorted by relevance

/freebsd-current/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyMemIntrinsicResults.cpp169 Register ToReg = MI.getOperand(0).getReg(); local
84 replaceDominatedUses(MachineBasicBlock &MBB, MachineInstr &MI, unsigned FromReg, unsigned ToReg, const MachineRegisterInfo &MRI, MachineDominatorTree &MDT, LiveIntervals &LIS) argument
/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/
H A DTwoAddressInstructionPass.cpp246 bool TwoAddressInstructionPass::isRevCopyChain(Register FromReg, Register ToReg, argument
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H A DSplitKit.cpp547 SlotIndex SplitEditor::buildCopy(Register FromReg, Register ToReg, argument
528 buildSingleSubRegCopy( Register FromReg, Register ToReg, MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, unsigned SubIdx, LiveInterval &DestLI, bool Late, SlotIndex Def, const MCInstrDesc &Desc) argument
H A DMachineRegisterInfo.cpp380 void MachineRegisterInfo::replaceRegWith(Register FromReg, Register ToReg) { argument
H A DMachineInstr.cpp1232 void MachineInstr::substituteRegister(Register FromReg, Register ToReg, argument
H A DModuloSchedule.cpp337 static void replaceRegUsesAfterLoop(unsigned FromReg, unsigned ToReg, argument
/freebsd-current/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCRegisterInfo.h147 unsigned ToReg; member in struct:llvm::MCRegisterInfo::DwarfLLVMRegPair
/freebsd-current/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonConstPropagation.cpp3124 replaceAllRegUsesWith(Register FromReg, Register ToReg) argument
H A DHexagonISelLowering.cpp2810 SDValue ToReg = getInstr(Hexagon::C2_tfrpr, dl, MVT::i32, {VecV}, DAG); local
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp6500 SDValue ToReg = DAG.getCopyToReg(Chain, SL, SGPR01, local

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