Searched defs:ToReg (Results 1 - 9 of 9) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyMemIntrinsicResults.cpp170 Register ToReg = MI.getOperand(0).getReg(); local
84 replaceDominatedUses(MachineBasicBlock &MBB, MachineInstr &MI, unsigned FromReg, unsigned ToReg, const MachineRegisterInfo &MRI, MachineDominatorTree &MDT, LiveIntervals &LIS) argument
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineRegisterInfo.cpp380 void MachineRegisterInfo::replaceRegWith(unsigned FromReg, unsigned ToReg) { argument
H A DMachineInstr.cpp1139 void MachineInstr::substituteRegister(Register FromReg, Register ToReg, argument
H A DSplitKit.cpp512 SlotIndex SplitEditor::buildSingleSubRegCopy(unsigned FromReg, unsigned ToReg, argument
538 SlotIndex SplitEditor::buildCopy(unsigned FromReg, unsigned ToReg, argument
H A DTwoAddressInstructionPass.cpp364 bool TwoAddressInstructionPass::isRevCopyChain(unsigned FromReg, unsigned ToReg, argument
801 unsigned ToReg = VirtRegPairs.back(); local
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H A DModuloSchedule.cpp334 static void replaceRegUsesAfterLoop(unsigned FromReg, unsigned ToReg, argument
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCRegisterInfo.h136 unsigned ToReg; member in struct:llvm::MCRegisterInfo::DwarfLLVMRegPair
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonConstPropagation.cpp3122 replaceAllRegUsesWith(unsigned FromReg, unsigned ToReg) argument
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp4639 SDValue ToReg = DAG.getCopyToReg(Chain, SL, SGPR01, local

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