Searched defs:SubRegs (Results 1 - 8 of 8) sorted by relevance

/openbsd-current/gnu/llvm/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp663 static const unsigned SubRegs[] = {AArch64::dsub0, AArch64::dsub1, local
672 static const unsigned SubRegs[] = {AArch64::qsub0, AArch64::qsub1, local
640 createTuple(ArrayRef<Register> Regs, const unsigned RegClassIDs[], const unsigned SubRegs[], MachineIRBuilder &MIB) argument
/openbsd-current/gnu/llvm/llvm/include/llvm/MC/
H A DMCRegisterInfo.h107 uint32_t SubRegs; // Sub-register set, described above member in struct:llvm::MCRegisterDesc
/openbsd-current/gnu/llvm/llvm/utils/TableGen/
H A DCodeGenRegisters.h278 SubRegMap SubRegs; member in struct:llvm::CodeGenRegister
H A DCodeGenRegisters.cpp616 ListInit *SubRegs = Def->getValueAsListInit("SubRegs"); variable
2122 const SubRegMap &SubRegs = Register.getSubRegs(); local
[all...]
/openbsd-current/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp2912 ArrayRef<int16_t> SubRegs = TRI.getRegSplitParts(SuperRC, EltSize); local
/openbsd-current/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp1432 static const unsigned SubRegs[] = {AArch64::dsub0, AArch64::dsub1, local
1441 static const unsigned SubRegs[] = {AArch64::qsub0, AArch64::qsub1, local
1451 static const unsigned SubRegs[] = {AArch64::zsub0, AArch64::zsub1, local
1457 createTuple(ArrayRef<SDValue> Regs, const unsigned RegClassIDs[], const unsigned SubRegs[]) argument
/openbsd-current/gnu/llvm/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp935 unsigned SubRegs = 0; local
[all...]
H A DARMISelDAGToDAG.cpp2937 uint16_t SubRegs[2] = {ARM::gsub_0, ARM::gsub_1}; local

Completed in 361 milliseconds