| /freebsd-10.0-release/contrib/llvm/lib/MC/ |
| H A D | MCRegisterInfo.cpp | 18 unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx, argument
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| /freebsd-10.0-release/contrib/llvm/lib/Target/ARM/ |
| H A D | Thumb2RegisterInfo.cpp | 35 emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred, unsigned PredReg, unsigned MIFlags) const argument
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| H A D | Thumb1RegisterInfo.cpp | 65 emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred, unsigned PredReg, unsigned MIFlags) const argument
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| H A D | ARMBaseRegisterInfo.cpp | 371 emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred, unsigned PredReg, unsigned MIFlags) const argument
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| H A D | ARMBaseInstrInfo.cpp | 757 AddDReg(MachineInstrBuilder &MIB, unsigned Reg, unsigned SubIdx, unsigned State, const TargetRegisterInfo *TRI) const argument
1272 reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, unsigned SubIdx, const MachineInstr *Orig, const TargetRegisterInfo &TRI) const argument
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| H A D | ARMISelDAGToDAG.cpp | 2156 unsigned SubIdx = ARM::dsub_0; local
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| /freebsd-10.0-release/contrib/llvm/lib/CodeGen/ |
| H A D | ExpandPostRAPseudos.cpp | 88 unsigned SubIdx = MI->getOperand(3).getImm(); local
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| H A D | MachineCopyPropagation.cpp | 120 unsigned SubIdx = TRI->getSubRegIndex(SrcSrc, Def); local
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| H A D | PeepholeOptimizer.cpp | 150 unsigned SrcReg, DstReg, SubIdx; local
[all...] |
| H A D | TargetRegisterInfo.cpp | 49 OS << ":sub(" << SubIdx << ')'; local
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| H A D | TargetInstrInfo.cpp | 279 reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, unsigned SubIdx, const MachineInstr *Orig, const TargetRegisterInfo &TRI) const argument
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| H A D | MachineVerifier.cpp | 885 unsigned SubIdx = MO->getSubReg(); local
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| H A D | TwoAddressInstructionPass.cpp | 1571 unsigned SubIdx = mi->getOperand(3).getImm(); local
1627 unsigned SubIdx = MI->getOperand(i+1).getImm(); local
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| H A D | MachineInstr.cpp | 69 void MachineOperand::substVirtReg(unsigned Reg, unsigned SubIdx, argument
1199 substituteRegister(unsigned FromReg, unsigned ToReg, unsigned SubIdx, const TargetRegisterInfo &RegInfo) argument
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| H A D | RegisterCoalescer.cpp | 1225 unsigned SubIdx; member in class:__anon2205::JoinVals
888 updateRegDefsUses(unsigned SrcReg, unsigned DstReg, unsigned SubIdx) argument
1711 usesLanes(MachineInstr *MI, unsigned Reg, unsigned SubIdx, unsigned Lanes) argument
[all...] |
| /freebsd-10.0-release/contrib/llvm/include/llvm/Target/ |
| H A D | TargetRegisterInfo.h | 854 unsigned SubIdx; member in class:llvm::TargetRegisterInfo::PrintReg
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 490 unsigned SubIdx; local
1165 unsigned SubIdx = UseMI->getOperand(3).getSubReg(); local
[all...] |
| /freebsd-10.0-release/contrib/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.h | 309 void setSubClassWithSubReg(CodeGenSubRegIndex *SubIdx, argument
319 void addSuperRegClass(CodeGenSubRegIndex *SubIdx, argument
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| H A D | AsmMatcherEmitter.cpp | 1623 int SubIdx = CGA.ResultInstOperandIndex[AliasOpNo].second; local
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| H A D | CodeGenRegisters.cpp | 469 CodeGenSubRegIndex *SubIdx = getSubRegIndex(SI->second); local
937 CodeGenRegisterClass::getSuperRegClasses(CodeGenSubRegIndex *SubIdx, argument
1708 CodeGenSubRegIndex *SubIdx = SubRegIndices[sri]; local
1741 CodeGenSubRegIndex *SubIdx = SubRegIndices[sri]; local
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 1720 reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, unsigned SubIdx, const MachineInstr *Orig, const TargetRegisterInfo &TRI) const argument
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