Searched defs:SPI_PS_INPUT_CNTL_5__DEFAULT_VAL_ATTR1__SHIFT (Results 1 - 11 of 11) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h9680 #define SPI_PS_INPUT_CNTL_5__DEFAULT_VAL_ATTR1__SHIFT 0x15 macro
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H A Dgfx_8_1_sh_mask.h10078 #define SPI_PS_INPUT_CNTL_5__DEFAULT_VAL_ATTR1__SHIFT 0x15 macro
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/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_2_1_sh_mask.h16848 #define SPI_PS_INPUT_CNTL_5__DEFAULT_VAL_ATTR1__SHIFT macro
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H A Dgc_9_1_sh_mask.h16973 #define SPI_PS_INPUT_CNTL_5__DEFAULT_VAL_ATTR1__SHIFT macro
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H A Dgc_9_0_sh_mask.h15664 #define SPI_PS_INPUT_CNTL_5__DEFAULT_VAL_ATTR1__SHIFT macro
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H A Dgc_9_4_2_sh_mask.h9097 #define SPI_PS_INPUT_CNTL_5__DEFAULT_VAL_ATTR1__SHIFT 0x15 macro
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H A Dgc_9_4_3_sh_mask.h19147 #define SPI_PS_INPUT_CNTL_5__DEFAULT_VAL_ATTR1__SHIFT macro
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H A Dgc_11_0_3_sh_mask.h23111 #define SPI_PS_INPUT_CNTL_5__DEFAULT_VAL_ATTR1__SHIFT macro
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H A Dgc_10_1_0_sh_mask.h23169 #define SPI_PS_INPUT_CNTL_5__DEFAULT_VAL_ATTR1__SHIFT macro
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H A Dgc_11_0_0_sh_mask.h20781 #define SPI_PS_INPUT_CNTL_5__DEFAULT_VAL_ATTR1__SHIFT macro
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H A Dgc_10_3_0_sh_mask.h21288 #define SPI_PS_INPUT_CNTL_5__DEFAULT_VAL_ATTR1__SHIFT macro
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