| /macosx-10.10.1/JavaScriptCore-7600.1.17/ftl/ |
| H A D | FTLSaveRestore.cpp | 75 struct Regs { struct in namespace:JSC::FTL::__anon2587
76 Regs() function in struct:JSC::FTL::__anon2587::Regs
|
| /macosx-10.10.1/llvmCore-3425.0.34/include/llvm/CodeGen/ |
| H A D | RegisterScavenging.h | 143 void setUsed(BitVector &Regs) { argument
146 void setUnused(BitVector &Regs) { argument
|
| H A D | CallingConvLower.h | 233 unsigned getFirstUnallocated(const uint16_t *Regs, unsigned NumRegs) const { argument
260 unsigned AllocateReg(const uint16_t *Regs, unsigned NumRegs) { argument
272 unsigned AllocateReg(const uint16_t *Regs, const uint16_t *ShadowRegs, argument
|
| H A D | MachineRegisterInfo.h | 382 void addPhysRegsUsed(const BitVector &Regs) { UsedPhysRegs |= Regs; } argument
|
| /macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Hexagon/ |
| H A D | HexagonCallingConvLower.h | 111 unsigned getFirstUnallocated(const unsigned *Regs, unsigned NumRegs) const { argument
138 unsigned AllocateReg(const unsigned *Regs, unsigned NumRegs) { argument
150 unsigned AllocateReg(const unsigned *Regs, const unsigned *ShadowRegs, argument
|
| /macosx-10.10.1/llvmCore-3425.0.34/lib/CodeGen/ |
| H A D | AggressiveAntiDepBreaker.cpp | 69 GetGroupRegs( unsigned Group, std::vector<unsigned> &Regs, std::multimap<unsigned, AggressiveAntiDepState::RegisterReference> *RegRefs) argument
[all...] |
| H A D | LocalStackSlotAllocation.cpp | 197 lookupCandidateBaseReg(const SmallVector<std::pair<unsigned, int64_t>, 8> &Regs, argument
|
| H A D | ExecutionDepsFix.cpp | 575 SmallVector<LiveReg, 4> Regs; local
|
| H A D | RegisterPressure.cpp | 86 void RegPressureTracker::increasePhysRegPressure(ArrayRef<unsigned> Regs) { argument
94 void RegPressureTracker::decreasePhysRegPressure(ArrayRef<unsigned> Regs) { argument
102 void RegPressureTracker::increaseVirtRegPressure(ArrayRef<unsigned> Regs) { argument
109 void RegPressureTracker::decreaseVirtRegPressure(ArrayRef<unsigned> Regs) { argument
273 hasRegAlias(unsigned Reg, SparseSet<unsigned> &Regs, const TargetRegisterInfo *TRI) argument
285 findRegAlias(unsigned Reg, SmallVectorImpl<unsigned> &Regs, const TargetRegisterInfo *TRI) argument
299 findReg(unsigned Reg, bool isVReg, SmallVectorImpl<unsigned> &Regs, const TargetRegisterInfo *TRI) argument
360 addLiveRegs(ArrayRef<unsigned> Regs) argument
[all...] |
| /macosx-10.10.1/llvmCore-3425.0.34/utils/TableGen/ |
| H A D | CodeGenTarget.cpp | 210 const StringMap<CodeGenRegister*> &Regs = getRegBank().getRegistersByName(); local
|
| H A D | RegisterInfoEmitter.cpp | 173 const CodeGenRegister::Set &Regs = RC.getMembers(); local
248 EmitRegMappingTables(raw_ostream &OS, const std::vector<CodeGenRegister*> &Regs, bool isCtor) argument
374 EmitRegMapping(raw_ostream &OS, const std::vector<CodeGenRegister*> &Regs, bool isCtor) argument
642 const std::vector<CodeGenRegister*> &Regs = RegBank.getRegisters(); local
1144 const std::vector<CodeGenRegister*> &Regs = RegBank.getRegisters(); local
1231 const SetTheory::RecVec *Regs = RegBank.getSets().expand(CSRSet); local
[all...] |
| H A D | CodeGenRegisters.cpp | 152 RegUnitIterator(const CodeGenRegister::Set &Regs): argument
975 std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register"); local
1229 CodeGenRegister::Set Regs; member in struct:__anon10608::UberRegSet
1260 const CodeGenRegister::Set &Regs = RegClass->getMembers(); local
1833 computeCoveredRegisters(ArrayRef<Record*> Regs) argument
[all...] |
| /macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 588 SmallVector<std::pair<unsigned,bool>, 4> Regs; local
658 SmallVector<unsigned, 4> Regs; local
[all...] |
| H A D | ARMLoadStoreOptimizer.cpp | 393 SmallVector<std::pair<unsigned, bool>, 8> Regs; local
282 MergeOps(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, int Offset, unsigned Base, bool BaseKill, int Opcode, ARMCC::CondCodes Pred, unsigned PredReg, unsigned Scratch, DebugLoc dl, ArrayRef<std::pair<unsigned, bool> > Regs, ArrayRef<unsigned> ImpDefs) argument
[all...] |
| /macosx-10.10.1/cxxfilt-11/cxxfilt/include/opcode/ |
| H A D | m88k.h | 208 Regs[REGs], member in struct:PROCESSOR
|
| /macosx-10.10.1/llvmCore-3425.0.34/lib/Transforms/Scalar/ |
| H A D | LoopStrengthReduce.cpp | 828 RateRegister(const SCEV *Reg, SmallPtrSet<const SCEV *, 16> &Regs, const Loop *L, ScalarEvolution &SE, DominatorTree &DT) argument
876 RatePrimaryRegister(const SCEV *Reg, SmallPtrSet<const SCEV *, 16> &Regs, const Loop *L, ScalarEvolution &SE, DominatorTree &DT, SmallPtrSet<const SCEV *, 16> *LoserRegs) argument
892 RateFormula(const Formula &F, SmallPtrSet<const SCEV *, 16> &Regs, const DenseSet<const SCEV *> &VisitedRegs, const Loop *L, const SmallVectorImpl<int64_t> &Offsets, ScalarEvolution &SE, DominatorTree &DT, SmallPtrSet<const SCEV *, 16> *LoserRegs) argument
1149 SmallPtrSet<const SCEV *, 4> Regs; member in class:__anon10398::LSRUse
3661 SmallPtrSet<const SCEV *, 16> Regs; local
[all...] |
| /macosx-10.10.1/llvmCore-3425.0.34/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 598 SmallVector<unsigned, 4> Regs; member in struct:__anon10014::RegsForValue
5841 SmallVector<unsigned, 4> Regs; local
[all...] |
| /macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 2188 CreateRegList(const SmallVectorImpl<std::pair<unsigned, SMLoc> > &Regs, argument
|