| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCCallingConv.cpp | 42 unsigned RegNum = State.getFirstUnallocated(ArgRegs); local
67 unsigned RegNum = State.getFirstUnallocated(ArgRegs); local
93 unsigned RegNum = State.getFirstUnallocated(ArgRegs); local
[all...] |
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/DebugInfo/DWARF/ |
| H A D | DWARFDebugFrame.cpp | 140 auto RegNum = Data.getULEB128(Offset); local
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRInstPrinter.cpp | 89 const char *AVRInstPrinter::getPrettyRegisterName(unsigned RegNum, argument
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | StackMaps.cpp | 93 int RegNum = TRI->getDwarfRegNum(Reg, false); local
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUPALMetadata.cpp | 263 static const char *getRegisterName(unsigned RegNum) { argument
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCInstPrinter.cpp | 510 const char *PPCInstPrinter::getVerboseConditionRegName(unsigned RegNum, argument
|
| /freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | InstructionSelectorImpl.h | 829 int64_t RegNum = MatchTable[CurrentIdx++]; local
834 << InsnID << "], " << RegNum << ")\n"); local
840 int64_t RegNum = MatchTable[CurrentIdx++]; local
845 << InsnID << "], " << RegNum << ")\n"); local
851 int64_t RegNum = MatchTable[CurrentIdx++]; local
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/BPF/AsmParser/ |
| H A D | BPFAsmParser.cpp | 88 unsigned RegNum; member in struct:__anon5109::BPFOperand::RegOp
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/MSP430/AsmParser/ |
| H A D | MSP430AsmParser.cpp | 197 static std::unique_ptr<MSP430Operand> CreateReg(unsigned RegNum, SMLoc S, argument
207 static std::unique_ptr<MSP430Operand> CreateMem(unsigned RegNum, argument
213 static std::unique_ptr<MSP430Operand> CreateIndReg(unsigned RegNum, SMLoc S, argument
218 static std::unique_ptr<MSP430Operand> CreatePostIndReg(unsigned RegNum, SMLoc S, argument
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 1067 unsigned RegNum = MO.isUndef() ? std::numeric_limits<unsigned>::max() local
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AVR/AsmParser/ |
| H A D | AVRAsmParser.cpp | 205 static std::unique_ptr<AVROperand> CreateReg(unsigned RegNum, SMLoc S, argument
216 CreateMemri(unsigned RegNum, const MCExpr *Val, SMLoc S, SMLoc E) { argument
337 int RegNum = matchFn(Name); local
354 int RegNum = parseRegisterName(&MatchRegisterName); local
363 int RegNum = AVR::NoRegister; local
703 int64_t RegNum = Const->getValue(); local
705 RegName << "r" << RegNum; local
[all...] |
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/ |
| H A D | LanaiAsmParser.cpp | 121 unsigned RegNum; member in struct:__anon5205::LanaiOperand::RegOp
592 static std::unique_ptr<LanaiOperand> createReg(unsigned RegNum, SMLoc Start, argument
694 unsigned RegNum; local
708 ParseRegister(unsigned &RegNum, SMLoc &StartLoc, SMLoc &EndLoc) argument
[all...] |
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 2465 unsigned RegNum = RegLst & 0x3; local
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsAsmPrinter.cpp | 346 unsigned RegNum = TRI->getEncodingValue(Reg); local
|
| H A D | MipsSEISelDAGToDAG.cpp | 79 uint64_t RegNum = cast<ConstantSDNode>(RegIdx)->getZExtValue(); local
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 231 unsigned RegNum; member in struct:__anon5338::SparcOperand::RegOp
387 static std::unique_ptr<SparcOperand> CreateReg(unsigned RegNum, unsigned Kind, argument
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDILCFGStructurizer.cpp | 503 insertCondBranchBefore( MachineBasicBlock *blk, MachineBasicBlock::iterator I, int NewOpcode, int RegNum, const DebugLoc &DL) argument
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXAsmPrinter.cpp | 289 unsigned RegNum = RegMap[Reg]; local
|
| /freebsd-12-stable/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 1614 unsigned RegNum = Reg.EnumValue; local
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 227 Register RegNum; member in struct:__anon5322::RISCVOperand::RegOp
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 205 unsigned RegNum; member in struct:__anon5129::HexagonOperand::RegTy
429 CreateReg(MCContext &Context, unsigned RegNum, SMLoc S, SMLoc E) { argument
1767 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); local
1784 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); local
1801 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); local
1821 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); local
1844 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); local
[all...] |
| /freebsd-12-stable/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | TargetInfo.h | 1010 const unsigned RegNum; member in struct:clang::TargetInfo::AddlRegName
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 140 unsigned RegNum = State.getFirstUnallocated(ArgRegs); local
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 311 unsigned RegNum; member in struct:__anon4934::AArch64Operand::RegOp
337 unsigned RegNum; member in struct:__anon4934::AArch64Operand::VectorListOp
1814 CreateReg(unsigned RegNum, RegKin argument
1833 CreateVectorReg(unsigned RegNum, RegKind Kind, unsigned ElementWidth, SMLoc S, SMLoc E, MCContext &Ctx, AArch64_AM::ShiftExtendType ExtTy = AArch64_AM::LSL, unsigned ShiftAmount = 0, unsigned HasExplicitAmount = false) argument
1848 CreateVectorList(unsigned RegNum, unsigned Count, unsigned NumElements, unsigned ElementWidth, RegKind RegisterKind, SMLoc S, SMLoc E, MCContext &Ctx) argument
2255 unsigned RegNum = 0; local
2297 tryParseScalarRegister(unsigned &RegNum) argument
3146 unsigned RegNum = matchRegisterNameAlias(Head, MatchKind); local
3171 unsigned RegNum; local
3443 unsigned RegNum; local
3478 unsigned RegNum; local
5388 unsigned RegNum; local
5672 unsigned RegNum; local
[all...] |
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 2113 getRegularReg(RegisterKind RegKind, unsigned RegNum, unsigned RegWidth) argument
2170 ParseSpecialReg(RegisterKind &RegKind, unsigned &RegNum, unsigned &RegWidth) argument
2185 ParseRegularReg(RegisterKind &RegKind, unsigned &RegNum, unsigned &RegWidth) argument
2213 ParseRegList(RegisterKind &RegKind, unsigned &RegNum, unsigned &RegWidth) argument
2251 ParseAMDGPURegister(RegisterKind &RegKind, unsigned &Reg, unsigned &RegNum, unsigned &RegWidth) argument
2322 unsigned Reg, RegNum, RegWidth; local
[all...] |