| /freebsd-10.0-release/contrib/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXRegisterInfo.cpp | 123 int NVPTXRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { argument
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| /freebsd-10.0-release/contrib/llvm/lib/Target/MBlaze/ |
| H A D | MBlazeAsmPrinter.cpp | 137 unsigned RegNum = getMBlazeRegisterNumbering(Reg); local
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| /freebsd-10.0-release/contrib/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.cpp | 90 int X86RegisterInfo::getCompactUnwindRegNum(unsigned RegNum, bool isEH) const { argument
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| /freebsd-10.0-release/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsAsmPrinter.cpp | 157 unsigned RegNum = TM.getRegisterInfo()->getEncodingValue(Reg); local
172 unsigned RegNum = TM.getRegisterInfo()->getEncodingValue(Reg); local
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| /freebsd-10.0-release/contrib/llvm/lib/Target/MBlaze/AsmParser/ |
| H A D | MBlazeAsmParser.cpp | 91 unsigned RegNum; member in struct:__anon2407::MBlazeOperand::RegOp
236 static MBlazeOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) { argument
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| /freebsd-10.0-release/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCCTRLoops.cpp | 141 unsigned RegNum; member in union:__anon2461::CountValue::Values
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| H A D | PPCISelLowering.cpp | 1863 unsigned RegNum = State.getFirstUnallocated(ArgRegs, NumArgRegs); local
1891 unsigned RegNum = State.getFirstUnallocated(ArgRegs, NumArgRegs); local
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCCodeEmitter.cpp | 1196 unsigned RegNum = GetX86RegNum(MO) << 4; local
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| /freebsd-10.0-release/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMCodeEmitter.cpp | 1300 unsigned RegNum = II->getRegisterInfo().getEncodingValue(MO.getReg()); local
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| H A D | ARMLoadStoreOptimizer.cpp | 485 unsigned RegNum = MO.isUndef() ? UINT_MAX : TRI->getEncodingValue(Reg); local
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| H A D | ARMISelDAGToDAG.cpp | 3489 unsigned RegNum = InlineAsm::getNumOperandRegisters(Flag); local
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| /freebsd-10.0-release/contrib/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 182 unsigned RegNum; member in struct:__anon2339::AArch64Operand::RegOp
739 static AArch64Operand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) { argument
745 static AArch64Operand *CreateWrappedReg(unsigned RegNum, SMLoc S, SMLoc E) { argument
1429 AArch64AsmParser::IdentifyRegister(unsigned &RegNum, SMLo argument
1485 unsigned RegNum; local
1611 unsigned RegNum; local
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 233 unsigned RegNum; member in struct:__anon2430::MipsOperand::RegOp
330 static MipsOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) { argument
885 matchRegisterByNumber(unsigned RegNum, unsigned RegClass) argument
895 int RegNum = -1; local
1294 int RegNum = matchRegisterName(DefSymbol.substr(1), isMips64()); local
1354 unsigned RegNum = Tok.getIntVal(); local
1384 unsigned RegNum = Tok.getIntVal(); local
1400 unsigned RegNum; local
[all...] |
| /freebsd-10.0-release/contrib/llvm/tools/clang/include/clang/Basic/ |
| H A D | TargetInfo.h | 573 const unsigned RegNum; member in struct:clang::TargetInfo::AddlRegName
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| /freebsd-10.0-release/contrib/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 1288 unsigned RegNum = Registers[i]->EnumValue; local
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| /freebsd-10.0-release/contrib/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 353 unsigned RegNum; member in struct:__anon2374::ARMOperand::RegOp
358 unsigned RegNum; member in struct:__anon2374::ARMOperand::VectorListOp
387 unsigned RegNum; member in struct:__anon2374::ARMOperand::PostIdxRegOp
1449 unsigned RegNum = getCondCode() == ARMCC::AL ? 0: ARM::CPSR; local
2149 CreateCCOut(unsigned RegNum, SMLoc S) argument
2166 CreateReg(unsigned RegNum, SMLoc S, SMLoc E) argument
2251 CreateVectorList(unsigned RegNum, unsigned Count, bool isDoubleSpaced, SMLoc S, SMLoc E) argument
2262 CreateVectorListAllLanes(unsigned RegNum, unsigned Count, bool isDoubleSpaced, SMLoc S, SMLoc E) argument
2274 CreateVectorListIndexed(unsigned RegNum, unsigned Count, unsigned Index, bool isDoubleSpaced, SMLoc S, SMLoc E) argument
2326 CreatePostIdxReg(unsigned RegNum, bool isAdd, ARM_AM::ShiftOpc ShiftTy, unsigned ShiftImm, SMLoc S, SMLoc E) argument
2511 unsigned RegNum = MatchRegisterName(lowerCase); local
[all...] |