| /freebsd-10-stable/contrib/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXRegisterInfo.cpp | 116 int NVPTXRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { argument
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| H A D | NVPTXAsmPrinter.cpp | 380 unsigned RegNum = RegMap[Reg]; local
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| /freebsd-10-stable/contrib/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.cpp | 89 int X86RegisterInfo::getCompactUnwindRegNum(unsigned RegNum, bool isEH) const { argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsAsmPrinter.cpp | 195 unsigned RegNum = TM.getRegisterInfo()->getEncodingValue(Reg); local
210 unsigned RegNum = TM.getRegisterInfo()->getEncodingValue(Reg); local
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| /freebsd-10-stable/contrib/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCCodeEmitter.cpp | 1419 unsigned RegNum = GetX86RegNum(MO) << 4; local
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| /freebsd-10-stable/contrib/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 156 unsigned RegNum; member in struct:__anon2607::SparcOperand::RegOp
295 static SparcOperand *CreateReg(unsigned RegNum, argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMCodeEmitter.cpp | 1302 unsigned RegNum = II->getRegisterInfo().getEncodingValue(MO.getReg()); local
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| H A D | ARMLoadStoreOptimizer.cpp | 562 unsigned RegNum = MO.isUndef() ? UINT_MAX : TRI->getEncodingValue(Reg); local
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| /freebsd-10-stable/contrib/llvm/lib/Target/R600/ |
| H A D | AMDILCFGStructurizer.cpp | 510 insertCondBranchBefore(MachineBasicBlock *blk, MachineBasicBlock::iterator I, int NewOpcode, int RegNum, DebugLoc DL) argument
521 insertCondBranchEnd(MachineBasicBlock *MBB, int NewOpcode, int RegNum) argument
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| /freebsd-10-stable/contrib/llvm/tools/clang/include/clang/Basic/ |
| H A D | TargetInfo.h | 592 const unsigned RegNum; member in struct:clang::TargetInfo::AddlRegName
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| /freebsd-10-stable/contrib/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 1282 unsigned RegNum = Registers[i]->EnumValue; local
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| /freebsd-10-stable/contrib/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 189 unsigned RegNum; member in struct:__anon2446::AArch64Operand::RegOp
200 unsigned RegNum; member in struct:__anon2446::AArch64Operand::VectorListOp
860 static AArch64Operand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) { argument
866 static AArch64Operand *CreateWrappedReg(unsigned RegNum, SMLoc S, SMLoc E) { argument
890 CreateVectorList(unsigned RegNum, unsigned Count, A64Layout::VectorLayout Layout, SMLoc S, SMLoc E) argument
1613 IdentifyRegister(unsigned &RegNum, SMLoc &RegEndLoc, StringRef &Layout, SMLoc &LayoutLoc) const argument
1716 unsigned RegNum; local
1843 unsigned RegNum; local
1962 TryParseVector(uint32_t &RegNum, SMLoc &RegEndLoc, StringRef &Layout, SMLoc &LayoutLoc) argument
[all...] |
| /freebsd-10-stable/contrib/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 317 unsigned RegNum; member in struct:__anon2528::MipsOperand::RegOp
427 static MipsOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) { argument
435 static MipsOperand *CreatePtrReg(unsigned RegNum, SMLoc S, SMLoc E) { argument
1087 matchRegisterByNumber(unsigned RegNum, unsigned RegClass) argument
1097 int RegNum = -1; local
1545 int RegNum = -1; local
1589 unsigned RegNum = Parser.getTok().getIntVal(); local
1667 int RegNum = matchMSA128RegisterName(RegName); local
1705 unsigned RegNum = Parser.getTok().getIntVal(); local
1715 int RegNum = -1; local
1795 int RegNum = -1; local
2000 int RegNum = -1; local
[all...] |
| /freebsd-10-stable/contrib/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 376 unsigned RegNum; member in struct:__anon2479::ARMOperand::RegOp
381 unsigned RegNum; member in struct:__anon2479::ARMOperand::VectorListOp
410 unsigned RegNum; member in struct:__anon2479::ARMOperand::PostIdxRegOp
1541 unsigned RegNum = getCondCode() == ARMCC::AL ? 0: ARM::CPSR; local
2275 CreateCCOut(unsigned RegNum, SMLoc S) argument
2292 CreateReg(unsigned RegNum, SMLoc S, SMLoc E) argument
2380 CreateVectorList(unsigned RegNum, unsigned Count, bool isDoubleSpaced, SMLoc S, SMLoc E) argument
2391 CreateVectorListAllLanes(unsigned RegNum, unsigned Count, bool isDoubleSpaced, SMLoc S, SMLoc E) argument
2403 CreateVectorListIndexed(unsigned RegNum, unsigned Count, unsigned Index, bool isDoubleSpaced, SMLoc S, SMLoc E) argument
2455 CreatePostIdxReg(unsigned RegNum, bool isAdd, ARM_AM::ShiftOpc ShiftTy, unsigned ShiftImm, SMLoc S, SMLoc E) argument
2652 unsigned RegNum = MatchRegisterName(lowerCase); local
[all...] |
| /freebsd-10-stable/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 1867 unsigned RegNum = State.getFirstUnallocated(ArgRegs, NumArgRegs); local
1895 unsigned RegNum = State.getFirstUnallocated(ArgRegs, NumArgRegs); local
[all...] |