| /openbsd-current/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64PBQPRegAlloc.cpp | 158 bool A57ChainingConstraint::addIntraChainConstraint(PBQPRAGraph &G, unsigned Rd, argument
242 void A57ChainingConstraint::addInterChainConstraint(PBQPRAGraph &G, unsigned Rd, argument
362 Register Rd = MI.getOperand(0).getReg(); local
372 Register Rd = MI.getOperand(0).getReg(); local
[all...] |
| /openbsd-current/gnu/llvm/lldb/source/Plugins/Instruction/RISCV/ |
| H A D | RISCVInstructions.h | 22 struct Rd { struct in namespace:lldb_private
|
| H A D | RISCVCInstructions.h | |
| /openbsd-current/gnu/llvm/lldb/source/Plugins/Instruction/ARM/ |
| H A D | EmulateInstructionARM.h | 202 WriteCoreReg(Context &context, const uint32_t result, const uint32_t Rd) argument
|
| H A D | EmulateInstructionARM.cpp | 1289 uint32_t Rd; // the destination register local
1377 uint32_t Rd; // the destination register local
1619 uint32_t Rd; // the destination register local
1681 uint32_t Rd; // the destination register local
3152 uint32_t Rd, Rn; local
3218 uint32_t Rd, Rn, Rm; local
3753 uint32_t Rd; // the destination register local
3838 uint32_t Rd; // the destination register local
5801 uint32_t Rd, Rn; local
5871 uint32_t Rd, Rn, Rm; local
5950 uint32_t Rd; local
6018 uint32_t Rd, Rn; local
6094 uint32_t Rd, Rn, Rm; local
6183 uint32_t Rd, Rn; local
6259 uint32_t Rd, Rn, Rm; local
8822 uint32_t Rd, Rn; local
8901 uint32_t Rd, Rn, Rm; local
8991 uint32_t Rd, Rn; local
9068 uint32_t Rd, Rn, Rm; local
9155 uint32_t Rd; // the destination register local
9228 uint32_t Rd; // the destination register local
9306 uint32_t Rd; // the destination register local
9366 uint32_t Rd; // the destination register local
9435 uint32_t Rd; // the destination register local
9504 uint32_t Rd; // the destination register local
9584 uint32_t Rd; // the destination register local
9678 uint32_t Rd; // the destination register local
14215 WriteCoreRegOptionalFlags( Context &context, const uint32_t result, const uint32_t Rd, bool setflags, const uint32_t carry, const uint32_t overflow) argument
[all...] |
| /openbsd-current/gnu/llvm/llvm/lib/Target/RISCV/Disassembler/ |
| H A D | RISCVDisassembler.cpp | 413 unsigned Rd = fieldFromInstruction(Insn, 7, 5); local
423 unsigned Rd = fieldFromInstruction(Insn, 7, 5); local
|
| /openbsd-current/gnu/llvm/llvm/lib/Target/MSP430/Disassembler/ |
| H A D | MSP430Disassembler.cpp | 194 unsigned Rd = fieldFromInstruction(Insn, 0, 4); local
|
| /openbsd-current/gnu/llvm/lldb/source/Plugins/Instruction/ARM64/ |
| H A D | EmulateInstructionARM64.cpp | 620 const uint32_t Rd = Bits32(opcode, 4, 0); local
|
| /openbsd-current/sys/arch/arm64/arm64/ |
| H A D | disasm.c | 744 extendreg_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn, uint64_t sf, uint64_t Rm, uint64_t option, uint64_t imm3, uint64_t Rn, uint64_t Rd, const char *op, const char *z_op) argument
787 shiftreg_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn, uint64_t sf, uint64_t shift, uint64_t Rm, uint64_t imm6, uint64_t Rn, uint64_t Rd, const char *dnm_op, const char *dzm_op, const char *znm_op) argument
977 addsub_imm_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn, uint64_t sf, uint64_t shift, uint64_t imm12, uint64_t Rn, uint64_t Rd, const char *op, const char *zop) argument
1003 csetsel_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn, uint64_t sf, uint64_t Rm, uint64_t cond, uint64_t Rn, uint64_t Rd, const char *op, const char *op2, const char *op3) argument
1526 crc32_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn, uint64_t sf, uint64_t Rm, uint64_t sz, uint64_t Rn, uint64_t Rd, const char *op) argument
[all...] |
| /openbsd-current/gnu/llvm/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 911 unsigned Rd = fieldFromInstruction(Insn, 0, 5); local
1010 unsigned Rd = fieldFromInstruction(insn, 0, 5); local
1072 unsigned Rd = fieldFromInstruction(insn, 0, 5); local
1612 unsigned Rd local
1669 unsigned Rd = fieldFromInstruction(insn, 0, 5); local
1700 unsigned Rd = fieldFromInstruction(insn, 0, 5); local
1739 unsigned Rd = fieldFromInstruction(insn, 0, 5); local
1757 unsigned Rd = fieldFromInstruction(insn, 0, 5); local
1775 unsigned Rd = fieldFromInstruction(insn, 0, 5); local
2006 unsigned Rd = fieldFromInstruction(insn, 0, 5); local
2031 unsigned Rd = fieldFromInstruction(insn, 0, 5); local
[all...] |
| /openbsd-current/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstExtenders.cpp | 325 Register Rd; member in struct:__anon2835::HexagonConstExtenders::ExtDesc
[all...] |
| H A D | HexagonFrameLowering.cpp | 2508 Register Rd = RdOp.getReg(), Rs = RsOp.getReg(); local
[all...] |
| H A D | HexagonInstrInfo.cpp | 1343 Register Rd = Op0.getReg(); local
[all...] |
| /openbsd-current/gnu/llvm/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 1691 MCOperand &Rd = Inst.getOperand(0); local
1724 MCOperand &Rd = Inst.getOperand(0); local
1734 MCOperand &Rd = Inst.getOperand(0); local
1922 MCOperand &Rd = Inst.getOperand(0); local
|
| /openbsd-current/gnu/usr.bin/binutils/opcodes/ |
| H A D | i386-dis.c | 215 #define Rd OP_Rd, d_mode macro
|
| /openbsd-current/gnu/llvm/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 2429 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
2685 unsigned Rd = fieldFromInstruction(Insn, 8, 4); local
2710 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
2738 unsigned Rd = fieldFromInstruction(Insn, 16, 4); local
2962 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
3294 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
3565 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
3613 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
3662 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
3698 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
3751 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
3852 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
3900 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
5117 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
5250 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
5317 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
5382 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
5449 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
5512 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
5582 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
5645 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
5726 unsigned Rd = fieldFromInstruction(Insn, 12, 4); local
5950 const unsigned Rd = fieldFromInstruction(Insn, 8, 4); local
7002 const unsigned Rd = fieldFromInstruction(Insn, 8, 4); local
[all...] |
| /openbsd-current/gnu/usr.bin/binutils-2.17/opcodes/ |
| H A D | i386-dis.c | 235 #define Rd OP_Rd, d_mode macro
|
| /openbsd-current/gnu/usr.bin/binutils/gas/config/ |
| H A D | tc-arm.c | 9725 int Rd, Rs, Rn = FAIL; local
9895 int Rd, Rs, Rn = FAIL; local
10004 int Rd, Rs = FAIL; local
10093 int Rd, Rb, Ro = FAIL; local
10948 int Rd, Rs, Rn; local
11186 int Rd, Rb, Ro; local
[all...] |
| /openbsd-current/gnu/usr.bin/binutils-2.17/gas/config/ |
| H A D | tc-arm.c | 6255 int Rd, Rn; local
6271 int Rd, Rs, Rn; local
6470 int Rd, Rs, Rn; local
6553 int Rd, Rs, Rn; local
7786 int Rd, Rs; local
[all...] |