| /freebsd-10.0-release/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsMachineFunction.cpp | 36 const TargetRegisterClass *RC; local
54 const TargetRegisterClass *RC; local
62 const TargetRegisterClass *RC = ST.isABI_N64() ? local
[all...] |
| H A D | MipsInstrInfo.h | 89 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
97 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
|
| H A D | Mips16RegisterInfo.cpp | 62 saveScavengerRegister(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, MachineBasicBlock::iterator &UseMI, const TargetRegisterClass *RC, unsigned Reg) const argument
|
| H A D | MipsRegisterInfo.cpp | 52 MipsRegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC, argument
|
| /freebsd-10.0-release/contrib/llvm/lib/Target/R600/ |
| H A D | SIRegisterInfo.cpp | 33 unsigned SIRegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC, argument
|
| /freebsd-10.0-release/contrib/llvm/lib/CodeGen/ |
| H A D | LiveStackAnalysis.cpp | 58 LiveStacks::getOrCreateInterval(int Slot, const TargetRegisterClass *RC) { argument
80 const TargetRegisterClass *RC = getIntervalRegClass(Slot); local
|
| H A D | AggressiveAntiDepBreaker.h | 45 const TargetRegisterClass *RC; member in struct:llvm::AggressiveAntiDepState::__anon2132
|
| H A D | CriticalAntiDepBreaker.cpp | 592 const TargetRegisterClass *RC = AntiDepReg != 0 ? Classes[AntiDepReg] : 0; local
359 findSuitableFreeRegister(RegRefIter RegRefBegin, RegRefIter RegRefEnd, unsigned AntiDepReg, unsigned LastNewReg, const TargetRegisterClass *RC, SmallVector<unsigned, 2> &Forbid) argument
|
| H A D | LocalStackSlotAllocation.cpp | 342 const TargetRegisterClass *RC = TRI->getPointerRegClass(*MF); local
|
| H A D | MachineRegisterInfo.cpp | 41 MachineRegisterInfo::setRegClass(unsigned Reg, const TargetRegisterClass *RC) { argument
47 constrainRegClass(unsigned Reg, const TargetRegisterClass *RC, unsigned MinNumRegs) argument
|
| H A D | PeepholeOptimizer.cpp | 269 const TargetRegisterClass *RC = MRI->getRegClass(SrcReg); local
|
| H A D | RegisterScavenging.cpp | 272 BitVector RegScavenger::getRegsAvailable(const TargetRegisterClass *RC) { argument
362 unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC, argument
[all...] |
| H A D | TargetRegisterInfo.cpp | 108 const TargetRegisterClass* RC = *I; local
120 getAllocatableSetForRC(const MachineFunction &MF, const TargetRegisterClass *RC, BitVector &R) argument
225 const TargetRegisterClass *RC = local
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 52 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
80 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
|
| H A D | Thumb2InstrInfo.cpp | 126 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
169 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXRegisterInfo.cpp | 29 std::string getNVPTXRegClassName(TargetRegisterClass const *RC) { argument
55 std::string getNVPTXRegClassStr(TargetRegisterClass const *RC) { argument
[all...] |
| /freebsd-10.0-release/contrib/llvm/utils/TableGen/ |
| H A D | FastISelEmitter.cpp | 36 const CodeGenRegisterClass *RC; member in struct:__anon3663::InstructionMemo
[all...] |
| /freebsd-10.0-release/contrib/llvm/include/llvm/CodeGen/ |
| H A D | RegisterClassInfo.h | 118 getMinCost(const TargetRegisterClass *RC) argument
126 getLastCostChange(const TargetRegisterClass *RC) argument
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/Target/MBlaze/ |
| H A D | MBlazeInstrInfo.cpp | 93 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
103 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
|
| /freebsd-10.0-release/contrib/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrInfo.cpp | 34 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
62 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
|
| /freebsd-10.0-release/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.cpp | 58 saveScavengerRegister(MachineBasicBlock &MBB, MachineBasicBlock::iterator SaveMBBI, MachineBasicBlock::iterator &UseMBBI, const TargetRegisterClass *RC, unsigned Reg) const argument
|
| /freebsd-10.0-release/contrib/llvm/lib/Target/X86/ |
| H A D | X86VZeroUpper.cpp | 157 const TargetRegisterClass *RC = &X86::VR256RegClass; local
|
| /freebsd-10.0-release/crypto/openssl/crypto/whrlpool/ |
| H A D | wp_block.c | 453 #define RC (&(Cx.q[256*N])) macro
|
| /freebsd-10.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 133 const TargetRegisterClass *RC = 0; local
219 const TargetRegisterClass *RC = local
276 const TargetRegisterClass *RC local
[all...] |
| H A D | ScheduleDAGSDNodes.cpp | 127 const TargetRegisterClass *RC = local
|