| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/blackfin/mach-bf537/boards/ |
| H A D | led.S | 24 R2 = ~R1; define
50 R2 = [SP++]; define
139 R2 = 6(X); define
144 R2 define
147 R2 = R2 & R1; define
148 R2 = R2 | R0; define
151 R2 = [SP++]; define
177 R2 = [SP++]; define
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| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/blackfin/lib/ |
| H A D | umulsi3_highpart.S | 12 R2 = R1.H * R0.H, R3 = R1.L * R0.H (FU); define
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| H A D | smulsi3_highpart.S | 12 R2 = R1.L * R0.L (FU); define
18 R2 = cc; define
26 R2 = cc; define
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| H A D | memmove.S | 68 R2 = R2 & R3; /* remainder */ define
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| H A D | memset.S | 55 R2 = 3; define
56 R2 = R0 & R2; /* addr bottom two bits */ define
62 R2 = R1 << 8; /* create quad filler */ define
76 R2 = R3; /* end point */ define
78 R2 = R2 - R3; /* bytes left */ define
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| H A D | divsi3.S | 121 R2 = R2.L (Z); define
132 R2 = -R1; define
134 R2 = R0 << 1; /* R2 ls define
139 R2 = R2 | R5; /* Shift quotient bit */ define
144 R2 = R2 << 1; /* Shift 64 bit dividend up by 1 bit */ define
169 R2 = -1 (X); define
174 R2 = 1 (Z); define
177 R2 = R0; /* assume divide by 1 => numerator */ define
182 R2 = -R2; define
200 R2 = R0 >> 31; define
210 R2 = -R0; // negate result if necessary define
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| H A D | memcmp.S | 59 R2 = R2 & R3; /* remainder */ define
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| H A D | udivsi3.S | 46 R2 = R1 << 16; define
50 R2 = R0 >> 31; /* if X is a 31-bit number */ define
52 R2 = R2 | R3; /* then it's okay to use the DIVQ builtins (fallthrough to fast)*/ define
113 R2 = R0 >> 16; define
115 R2 = R3 - R2; /* shifted divisor < upper 16 bits of dividend */ define
135 R2 = R2.L (Z); define
152 R2 = R1 >> 1; define
159 R2 = R0 >> 1; define
160 R2 = R0 >> 1; define
174 R2 = R2 << 1; /* Shift 64 bit dividend up by 1 bit */ define
199 R2 = R2 + R6; /* if yes, add one to quotient(Q) */ define
208 R2 = 0; define
210 R2 = -1 (X); /* X/0 => 0xFFFFFFFF */ define
213 R2 = -R2; /* R2 now 1 */ define
216 R2 = R0; /* X/1 => X */ define
236 R2 = R0 >> 31; define
256 R2 = R0; define
285 R2 = R3; /* Preserve Q */ define
287 R2 = R0 - R2; /* E = X - M */ define
293 R2 = R2 >> 16; /* E >> 16 */ define
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| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/blackfin/mach-common/ |
| H A D | cplbhdlr.S | 46 R2 = SEQSTAT; define
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| H A D | lock.S | 177 R2 = 0xFFFFFF87 (X); define
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| H A D | cache.S | 122 R2 = -L1_CACHE_BYTES; define
123 R2 = R0 & R2; define
147 R2 = -L1_CACHE_BYTES; define
148 R2 = R0 & R2; define
173 R2 = -L1_CACHE_BYTES; define
174 R2 define
234 R2 = -L1_CACHE_BYTES; define
235 R2 = R0 & R2; define
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| H A D | cacheinit.S | 67 R2 = [I2++]; define
118 R2 = [I2++]; define
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| H A D | dpmc.S | 316 R2 = 0x0404(Z); define
319 R2 = DEPOSIT(R7, R1); define
375 R2 = [P0]; define
378 R2 = R2|R define
387 R2 = [P0]; define
391 R2 = R2&R3; define
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| H A D | cplbmgr.S | 102 R2 = EXTRACT(R0,R3.L) (Z); /* Get page size*/ define
105 R2 = [P1]; /* Get the page size*/ define
162 R2 = [P2]; /* address from config table */ define
215 R2 = [P2++]; /* data from config table */ define
315 R2 = R5.L (Z); /* indicating which CPLB triggered the event.*/ define
318 R2 = R2.L (Z); /* into the DCPLB table.*/ define
333 R2 = 1<<3; /* checking write in user mode*/ define
337 R2 = R3 & R2; define
400 R2 = R1 & R0; /* and test for interesting bits.*/ define
404 R2 = [P0 - 0x104]; /* R2 - PageStart */ define
449 R2 = [P2]; define
463 R2 = 0; define
521 R2 = [P2++]; /* data */ define
[all...] |
| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/openssl/crypto/md5/asm/ |
| H A D | md5-586.pl | 93 sub R2 subroutine
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| H A D | md5-sparcv9.S | 52 #define R2 %l2 define
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| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/timemachine/openssl-0.9.8e/crypto/md5/asm/ |
| H A D | md5-586.pl | 93 sub R2 subroutine
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| H A D | md5-sparcv9.S | 52 #define R2 %l2 define
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| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/timemachine/db-4.7.25.NC/hmac/ |
| H A D | sha1.c | 99 #define R2(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0x6ED9EBA1+rol(v,5);w=rol(w,30); macro
[all...] |
| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/openssl/crypto/md4/ |
| H A D | md4_locl.h | 152 #define R2(a,b,c,d,k,s,t) { \ macro
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| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/openssl/crypto/md5/ |
| H A D | md5_locl.h | 164 #define R2(a,b,c,d,k,s,t) { \ macro
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| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/timemachine/openssl-0.9.8e/crypto/md4/ |
| H A D | md4_locl.h | 154 #define R2(a,b,c,d,k,s,t) { \ macro
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| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/timemachine/openssl-0.9.8e/crypto/md5/ |
| H A D | md5_locl.h | 168 #define R2(a,b,c,d,k,s,t) { \ macro
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| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/minidlna/ffmpeg-0.5.1/libavutil/ |
| H A D | sha1.c | 42 #define R2(v,w,x,y,z,i) z+=( w^x ^y) +blk (i)+0x6ED9EBA1+rol(v,5);w=rol(w,30); macro
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| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/ppp-2.4.4/pppd/ |
| H A D | sha1.c | 37 #define R2(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0x6ED9EBA1+rol(v,5);w=rol(w,30); macro
[all...] |