Searched defs:PCIEIP_REG_VENDOR_SPECIFIC_REG5_VF_BAR4_STRIDE_BITS_BB (Results 1 - 1 of 1) sorted by relevance

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2337 #define PCIEIP_REG_VENDOR_SPECIFIC_REG5_VF_BAR4_STRIDE_BITS_BB (0x7fffffff<<0) // This field defines alignment and stride of VF BAR4 address space. The bits are a power of 2 value that multiplies the PF VF Bar4 value to compute the starting address and alignment of the BAR4 for each VF. This field may only have 1 bit set.This field is ignored when bit 31 is 0. macro
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