Searched defs:PCIEIP_REG_SRIOV_CAP_BB (Results 1 - 1 of 1) sorted by relevance

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2541 #define PCIEIP_REG_SRIOV_CAP_BB 0x0001c0UL //Access:R DataWidth:0x20 // The read-only value of this register is controlled by setting bit 7 of the EXT_CAP_ENA for EP, The capability can be enabled by default by defining SRIOV in version.v . macro
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