Searched defs:PCIEIP_REG_SD_EQ_CONTROL1_REG_EVAL_INTERVAL_TIME_K2 (Results 1 - 1 of 1) sorted by relevance

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h3941 #define PCIEIP_REG_SD_EQ_CONTROL1_REG_EVAL_INTERVAL_TIME_K2 (0x3<<16) // Eval Interval Time. Indicates interval time of RxEqEval assertion. - 00: 500ns - 01: 1us - 10: 2us - 11: 4us This field is used for EQ Master(DSP in EQ Phase3/USP in EQ Phase2). Note: This register field is sticky. macro
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