Searched defs:PCIEIP_REG_REG_PCIE_LINK_CAPABILITY_RC_BB (Results 1 - 1 of 1) sorted by relevance

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h4945 #define PCIEIP_REG_REG_PCIE_LINK_CAPABILITY_RC_BB 0x0004f0UL //Access:RW DataWidth:0x20 // Multi Field Register. macro
[all...]

Completed in 2439 milliseconds