Searched defs:PCIEIP_REG_REG_ID_VAL5_NO_SOFT_RESET_BB (Results 1 - 1 of 1) sorted by relevance

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h4688 #define PCIEIP_REG_REG_ID_VAL5_NO_SOFT_RESET_BB (0x1<<9) // This indicates function does not perform an internal reset when transitioning from D3 to D0. the value is reflected in corresponding field in PM CSR. macro
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