Searched defs:PCIEIP_REG_REG_BAR3_CONFIG_BAR3_64ENA_BB (Results 1 - 1 of 1) sorted by relevance

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h4953 #define PCIEIP_REG_REG_BAR3_CONFIG_BAR3_64ENA_BB (0x1<<4) // This bit enables the advertisement of bar_5 as a 32-bit address. The value of this bit maps directly to bit 2 of bar_5. This value is sticky and only reset by HARD Reset. This register is only applicable for EP. macro
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