Searched defs:PCIEIP_REG_PORT_VC_STATUS_CONTROL_BB (Results 1 - 1 of 1) sorted by relevance

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2119 #define PCIEIP_REG_PORT_VC_STATUS_CONTROL_BB 0x00016cUL //Access:R DataWidth:0x20 // Multi Field Register. macro
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