Searched defs:PCIEIP_REG_PORT_VC_CAPABILITY2_BB (Results 1 - 1 of 1) sorted by relevance
/freebsd-11-stable/sys/dev/qlnx/qlnxe/ | ||
H A D | reg_addr.h | 2104 #define PCIEIP_REG_PORT_VC_CAPABILITY2_BB 0x000168UL //Access:R DataWidth:0x20 // Not implemented. macro [all...] |
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