Searched defs:PCIEIP_REG_PM_CAP_PME_IN_D3_COLD_BB (Results 1 - 1 of 1) sorted by relevance

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h586 #define PCIEIP_REG_PM_CAP_PME_IN_D3_COLD_BB (0x1<<31) // This bit indicates whether the device supports transmiting PME message from the D3cold power state. This is supported if the VAUX_PRESENT input pin is high. This bit reflects the input value of the VAUX_PRESENT input pin. Path = input pins to pcie_vaux macro
[all...]

Completed in 2893 milliseconds