Searched defs:PCIEIP_REG_PCIEEP_RAS_SD_CTL1_FORCE_DETECT_LANE_E5 (Results 1 - 1 of 1) sorted by relevance

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h4144 #define PCIEIP_REG_PCIEEP_RAS_SD_CTL1_FORCE_DETECT_LANE_E5 (0xffff<<0) // Force detect lane. When set, the core ignores receiver detection from PHY during LTSSM detect state and uses this value instead. 0x0 = Lane0. 0x1 = Lane1. 0x2 = Lane2. 0x7 = Lane7. macro
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