Searched defs:PCIEIP_REG_PCIEEP_RAS_EINJ_CTL6PE_EINJ6_INV_CNTRL_E5 (Results 1 - 1 of 1) sorted by relevance

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h4100 #define PCIEIP_REG_PCIEEP_RAS_EINJ_CTL6PE_EINJ6_INV_CNTRL_E5 (0x1<<8) // Inverted error injection control. 0x0 = EINJ6_CHG_VAL_H[0/1/2/3] is used to replace bits specified by EINJ6_CHG_PT_H[0/1/2/3]. 0x1 = EINJ6_CHG_VAL_H[0/1/2/3] is ignored and inverts bits specified by EINJ6_CHG_PT_H[0/1/2/3]. macro
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