Searched defs:PCIEIP_REG_PCIEEP_RASDP_EP_CTL_EP_DIS_AXIB_MASC_E5 (Results 1 - 1 of 1) sorted by relevance

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h4479 #define PCIEIP_REG_PCIEEP_RASDP_EP_CTL_EP_DIS_AXIB_MASC_E5 (0x1<<1) // Error correction disable for AXI bridge master completion buffer (not supported). macro
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