Searched defs:PCIEIP_REG_PCIEEP_PL16G_STATUS_EQ_CPL_E5 (Results 1 - 1 of 1) sorted by relevance
/freebsd-11-stable/sys/dev/qlnx/qlnxe/ | ||
H A D | reg_addr.h | 2468 #define PCIEIP_REG_PCIEEP_PL16G_STATUS_EQ_CPL_E5 (0x1<<0) // Equalization 16.0 GT/s complete. macro [all...] |
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