Searched defs:PCIEIP_REG_PCIEEP_MRG_PORT_CAP_STAT_M_SWRDY_E5 (Results 1 - 1 of 1) sorted by relevance

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2692 #define PCIEIP_REG_PCIEEP_MRG_PORT_CAP_STAT_M_SWRDY_E5 (0x1<<17) // Margining software ready. macro
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