Searched defs:PCIEIP_REG_PCIEEP_L1SUB_CTL2_T_PWR_ON_VAL_E5 (Results 1 - 1 of 1) sorted by relevance

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h3600 #define PCIEIP_REG_PCIEEP_L1SUB_CTL2_T_PWR_ON_VAL_E5 (0x1f<<3) // T power on value. Along with the [T_PWR_ON_SCA], sets the minimum amount of time (in us) that the Port must wait in L.1.2.Exit after sampling PCI_CLKREQ_L asserted before actively driving the interface. macro
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