Searched defs:PCIEIP_REG_PCIEEP_EQ_CTL45_L4URPH_E5 (Results 1 - 1 of 1) sorted by relevance
/freebsd-11-stable/sys/dev/qlnx/qlnxe/ | ||
H A D | reg_addr.h | 2248 #define PCIEIP_REG_PCIEEP_EQ_CTL45_L4URPH_E5 (0x7<<12) // Lane 4 upstream port receiver preset hint. macro [all...] |
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