Searched defs:PCIEIP_REG_PCIEEP_BAR0L_TYP_E5 (Results 1 - 1 of 1) sorted by relevance

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h299 #define PCIEIP_REG_PCIEEP_BAR0L_TYP_E5 (0x3<<1) // BAR type. 0x0 = 32-bit BAR. 0x2 = 64-bit BAR. This field is writable through PEM()_CFG_WR. However, the application must not change this field. macro
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