Searched defs:PCIEIP_REG_DEVICE_CAPABILITY_L0S_ACCEPTABLE_LATENCY_BB (Results 1 - 1 of 1) sorted by relevance

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h1190 #define PCIEIP_REG_DEVICE_CAPABILITY_L0S_ACCEPTABLE_LATENCY_BB (0x7<<6) // Endpoint L0s Acceptable Latency. These bits are programmable through register space. The value should be 0 for root ports. Path= i_cfg_func.i_cfg_private macro
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