Searched defs:PCIEIP_REG_CONFIG_2_CFG_CYCLE_RETRY_BB (Results 1 - 1 of 1) sorted by relevance

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h4389 #define PCIEIP_REG_CONFIG_2_CFG_CYCLE_RETRY_BB (0x1<<6) // This bit will force the PCI bus to re-try all cycles to the configuration space until it is cleared. This is used to block the host from accessing context if needed to prevent reading of false data. This bit may be used in combination with the FIRST_CFG_DONE bit below to prevent changing of the configuration space values after they have be read by the system. Normally this bit will be set by the firmware while the configuration space is programmed. This bit also exists in each VF and can be used to control individual VF. macro
[all...]

Completed in 2244 milliseconds