Searched defs:Orders (Results 1 - 4 of 4) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DFastISel.h576 DenseMap<MachineInstr *, unsigned> Orders; member in struct:llvm::FastISel::InstOrderMap
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DConstantHoisting.cpp249 SmallVector<BasicBlock *, 16> Orders; local
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DInlineSpiller.cpp1227 getVisitOrders( MachineBasicBlock *Root, SmallPtrSet<MachineInstr *, 16> &Spills, SmallVectorImpl<MachineDomTreeNode *> &Orders, SmallVectorImpl<MachineInstr *> &SpillsToRm, DenseMap<MachineDomTreeNode *, unsigned> &SpillsToKeep, DenseMap<MachineDomTreeNode *, MachineInstr *> &SpillBBToSpill) argument
1320 SmallVector<MachineDomTreeNode *, 32> Orders; local
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/freebsd-12-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DCodeGenRegisters.h295 std::vector<SmallVector<Record*, 16>> Orders; member in class:llvm::CodeGenRegisterClass

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