| /openbsd-current/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | AllocationOrder.h | 32 ArrayRef<MCPhysReg> Order; member in class:llvm::AllocationOrder
[all...] |
| H A D | AllocationOrder.cpp | 34 auto Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg)); local
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| H A D | BreakFalseDeps.cpp | 156 ArrayRef<MCPhysReg> Order = RegClassInfo.getOrder(OpRC); local
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| H A D | RegAllocBasic.cpp | 265 auto Order = local
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| H A D | RegAllocEvictionAdvisor.cpp | 275 tryFindEvictionCandidate( const LiveInterval &VirtReg, const AllocationOrder &Order, uint8_t CostPerUseLimit, const SmallVirtRegSet &FixedRegisters) const argument
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| H A D | CriticalAntiDepBreaker.cpp | 406 ArrayRef<MCPhysReg> Order = RegClassInfo.getOrder(RC); local
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| H A D | LocalStackSlotAllocation.cpp | 58 unsigned Order; member in class:__anon2107::FrameRef
304 unsigned Order = 0; local
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| H A D | RegAllocGreedy.cpp | 449 auto Order = local
394 tryAssign(const LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<Register> &NewVRegs, const SmallVirtRegSet &FixedRegisters) argument
527 getOrderLimit(const LiveInterval &VirtReg, const AllocationOrder &Order, unsigned CostPerUseLimit) const argument
573 tryEvict(const LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<Register> &NewVRegs, uint8_t CostPerUseLimit, const SmallVirtRegSet &FixedRegisters) argument
[all...] |
| /openbsd-current/gnu/llvm/llvm/tools/llvm-tapi-diff/ |
| H A D | DiffEngine.cpp | 24 StringRef setOrderIndicator(InterfaceInputOrder Order) { argument
[all...] |
| H A D | DiffEngine.h | 64 DiffScalarVal(InterfaceInputOrder Order, T Val) argument
76 InterfaceInputOrder Order; member in class:llvm::DiffScalarVal
83 SymScalar(InterfaceInputOrder Order, const MachO::Symbol *Sym) argument
99 InterfaceInputOrder Order; member in class:llvm::SymScalar
[all...] |
| /openbsd-current/games/mille/ |
| H A D | extern.c | 43 Order, /* set if hand should be sorted */ variable
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| /openbsd-current/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | RegisterClassInfo.h | 36 std::unique_ptr<MCPhysReg[]> Order; member in struct:llvm::RegisterClassInfo::RCInfo
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| /openbsd-current/gnu/llvm/libcxx/benchmarks/ |
| H A D | map.bench.cpp | 45 enum class Order { Sorted, Random }; class in namespace:__anon1319
[all...] |
| /openbsd-current/gnu/llvm/llvm/lib/Support/ |
| H A D | DynamicLibrary.cpp | 81 void *LibLookup(const char *Symbol, DynamicLibrary::SearchOrdering Order) { argument
96 void *Lookup(const char *Symbol, DynamicLibrary::SearchOrdering Order) { argument
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| /openbsd-current/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInsertDelayAlu.cpp | 241 SmallVector<const_iterator, 8> Order; local
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| /openbsd-current/gnu/llvm/clang/lib/Format/ |
| H A D | QualifierAlignmentFixer.cpp | 470 PrepareLeftRightOrdering( const std::vector<std::string> &Order, std::vector<std::string> &LeftOrder, std::vector<std::string> &RightOrder, std::vector<tok::TokenKind> &Qualifiers) argument
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| /openbsd-current/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAGHVX.cpp | 132 ArrayRef<Node> Order; member in struct:__anon2859::Coloring
379 std::vector<ElemType> Order; member in namespace:__anon2860
[all...] |
| /openbsd-current/gnu/llvm/llvm/tools/llvm-profgen/ |
| H A D | CSPreInliner.cpp | 76 std::vector<StringRef> Order; local
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| /openbsd-current/gnu/llvm/llvm/tools/verify-uselistorder/ |
| H A D | verify-uselistorder.cpp | 404 SmallDenseMap<const Use *, short, 16> Order; local
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| /openbsd-current/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SDNodeDbgValue.h | 149 unsigned Order; member in class:llvm::SDDbgValue
245 unsigned Order; member in class:llvm::SDDbgLabel
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| /openbsd-current/gnu/llvm/libcxx/benchmarks/algorithms/ |
| H A D | common.h | 32 enum class Order { class
[all...] |
| /openbsd-current/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.cpp | 57 static void addHints(ArrayRef<MCPhysReg> Order, argument
74 getRegAllocationHints( Register VirtReg, ArrayRef<MCPhysReg> Order, SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const argument
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| /openbsd-current/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.cpp | 336 getRegAllocationHints( Register VirtReg, ArrayRef<MCPhysReg> Order, SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const argument
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| /openbsd-current/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVRegisterInfo.cpp | 691 getRegAllocationHints( Register VirtReg, ArrayRef<MCPhysReg> Order, SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const argument
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| /openbsd-current/gnu/llvm/llvm/include/llvm/IR/ |
| H A D | Instruction.h | 48 mutable unsigned Order = 0; member in class:llvm::Instruction
|