Searched defs:Opc (Results 1 - 25 of 82) sorted by relevance

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/freebsd-10.0-release/contrib/llvm/lib/Target/Mips/
H A DMipsAnalyzeImmediate.h20 unsigned Opc, ImmOpnd; member in struct:llvm::MipsAnalyzeImmediate::Inst
H A DMips16ISelDAGToDAG.cpp45 Mips16DAGToDAGISel::selectMULT(SDNode *N, unsigned Opc, DebugLoc DL, EVT Ty, argument
253 unsigned Opc = InFlag.getOpcode(); (void)Opc; local
H A DMips16InstrInfo.cpp72 unsigned Opc = 0; local
108 unsigned Opc = 0; local
123 unsigned Opc = 0; local
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H A DMipsInstrInfo.cpp77 void MipsInstrInfo::AnalyzeCondBr(const MachineInstr *Inst, unsigned Opc, argument
107 unsigned Opc = Cond[0].getImm(); local
H A DMipsSEInstrInfo.cpp44 unsigned Opc = MI->getOpcode(); local
69 unsigned Opc = MI->getOpcode(); local
89 unsigned Opc = 0, ZeroReg = 0; local
182 unsigned Opc = 0; local
215 unsigned Opc = 0; local
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/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h349 bool isUncondBranchOpcode(int Opc) { argument
354 bool isCondBranchOpcode(int Opc) { argument
359 isJumpTableBranchOpcode(int Opc) argument
365 isIndirectBranchOpcode(int Opc) argument
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H A DARMInstrInfo.cpp122 unsigned Opc = TM->getSubtarget<ARMSubtarget>().isThumb2() ? local
H A DThumb1FrameLowering.cpp69 unsigned Opc = Old->getOpcode(); local
H A DThumb1RegisterInfo.cpp129 int Opc = (isSub) ? ARM::tSUBrr : (isHigh ? ARM::tADDhirr : ARM::tADDrr); local
143 static unsigned calcNumMI(int Opc, int ExtraOpc, unsigned Bytes, argument
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/freebsd-10.0-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonExpandPredSpillCode.cpp85 int Opc = MI->getOpcode(); local
H A DHexagonCFGOptimizer.cpp60 static bool IsConditionalBranch(int Opc) { argument
66 static bool IsUnconditionalJump(int Opc) { argument
113 int Opc = MI->getOpcode(); local
/freebsd-10.0-release/contrib/llvm/lib/Target/MBlaze/
H A DMBlazeISelDAGToDAG.cpp101 unsigned Opc = N->getOpcode(); local
213 unsigned Opc = MBlaze::ADDIK; local
H A DMBlazeInstrInfo.cpp196 unsigned Opc = MBlaze::BRID; local
H A DMBlazeInstrInfo.h144 inline static bool isUncondBranchOpcode(int Opc) { argument
155 inline static bool isCondBranchOpcode(int Opc) { argument
/freebsd-10.0-release/contrib/llvm/lib/Target/MSP430/
H A DMSP430FrameLowering.cpp142 unsigned Opc = PI->getOpcode(); local
H A DMSP430InstrInfo.cpp92 unsigned Opc; local
H A DMSP430ISelDAGToDAG.cpp364 unsigned Opc = (VT == MVT::i16 ? Opc16 : Opc8); local
/freebsd-10.0-release/contrib/llvm/lib/Target/R600/
H A DSIInstrInfo.cpp80 unsigned Opc = I->getOpcode(); local
H A DAMDGPUInstrInfo.cpp181 AMDGPUInstrInfo::getOpcodeAfterMemoryUnfold(unsigned Opc, argument
/freebsd-10.0-release/contrib/llvm/lib/Target/X86/
H A DX86FrameLowering.cpp107 unsigned Opc = MBBI->getOpcode(); local
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H A DX86RegisterInfo.cpp466 unsigned Opc = MI.getOpcode(); local
/freebsd-10.0-release/contrib/llvm/include/llvm/Support/
H A DConstantFolder.h97 Constant *CreateBinOp(Instruction::BinaryOps Opc, argument
H A DTargetFolder.h109 Constant *CreateBinOp(Instruction::BinaryOps Opc, argument
/freebsd-10.0-release/contrib/llvm/lib/MC/
H A DMCExpr.cpp151 const MCBinaryExpr *MCBinaryExpr::Create(Opcode Opc, const MCExpr *LHS, argument
156 const MCUnaryExpr *MCUnaryExpr::Create(Opcode Opc, const MCExpr *Expr, argument
/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMAddressingModes.h407 static inline unsigned getAM2Opc(AddrOpc Opc, unsigned Imm12, ShiftOpc SO, argument

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