/freebsd-current/contrib/llvm-project/llvm/lib/MC/MCDisassembler/ |
H A D | MCDisassembler.cpp | 28 tryAddingSymbolicOperand(MCInst &Inst, int64_t Value, uint64_t Address, bool IsBranch, uint64_t Offset, uint64_t OpSize, uint64_t InstSize) const argument
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H A D | MCExternalSymbolizer.cpp | 34 tryAddingSymbolicOperand( MCInst &MI, raw_ostream &cStream, int64_t Value, uint64_t Address, bool IsBranch, uint64_t Offset, uint64_t OpSize, uint64_t InstSize) argument
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64ExternalSymbolizer.cpp | 61 tryAddingSymbolicOperand( MCInst &MI, raw_ostream &CommentStream, int64_t Value, uint64_t Address, bool IsBranch, uint64_t Offset, uint64_t OpSize, uint64_t InstSize) argument
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMLegalizerInfo.cpp | 405 auto OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); local
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H A D | ARMInstructionSelector.cpp | 459 CmpConstants(unsigned CmpOpcode, unsigned FlagsOpcode, unsigned SelectOpcode, unsigned OpRegBank, unsigned OpSize) argument
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
H A D | PPCInstructionSelector.cpp | 154 selectLoadStoreOp(unsigned GenericOpc, unsigned RegBankID, unsigned OpSize) argument
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/freebsd-current/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | X86RecognizableInstr.cpp | 411 handleOperand( bool optional, unsigned &operandIndex, unsigned &physicalOperandIndex, unsigned numPhysicalOperands, const unsigned *operandMapping, OperandEncoding (*encodingFromString)(const std::string &, uint8_t OpSize)) argument [all...] |
H A D | X86RecognizableInstr.h | 194 uint8_t OpSize; member in struct:llvm::X86Disassembler::RecognizableInstrBase [all...] |
/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | GISelKnownBits.cpp | 489 unsigned OpSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); local
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H A D | LegalizerHelper.cpp | 5693 uint64_t OpSize = MRI.getType(OpReg).getSizeInBits(); local 5759 uint64_t OpSize = MRI.getType(OpReg).getSizeInBits(); local
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 798 selectBinaryOp(unsigned GenericOpc, unsigned RegBankID, unsigned OpSize) argument 869 selectLoadStoreUIOp(unsigned GenericOpc, unsigned RegBankID, unsigned OpSize) argument [all...] |
/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetInstrInfo.cpp | 658 int64_t OpSize = MFI.getObjectSize(FI); local
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/freebsd-current/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | ConstantFolding.cpp | 809 unsigned OpSize = DL.getTypeSizeInBits(Op0->getType()); local
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPURegisterBankInfo.cpp | 894 unsigned OpSize = OpTy.getSizeInBits(); local
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H A D | SIISelLowering.cpp | 3715 unsigned OpSize = Flags.isByVal() ? local
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/M68k/ |
H A D | M68kISelLowering.cpp | 735 uint32_t OpSize = (VA.getLocVT().getSizeInBits() + 7) / 8; local
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
H A D | AMDGPUAsmParser.cpp | 3438 auto OpSize = AMDGPU::getOperandSize(Desc, OpIdx); local
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/freebsd-current/contrib/llvm-project/llvm/tools/llvm-objdump/ |
H A D | MachODump.cpp | 2806 SymbolizerGetOpInfo(void *DisInfo, uint64_t Pc, uint64_t Offset, uint64_t OpSize, uint64_t InstSize, int TagType, void *TagBuf) argument
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 5128 uint32_t OpSize = (Arg.getValueSizeInBits() + 7) / 8; local 13836 auto OpSize = N->getOperand(0).getValueSizeInBits(); local
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 7923 unsigned OpSize; local [all...] |