| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLegalizerInfo.cpp | 400 auto OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); local
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| H A D | ARMInstructionSelector.cpp | 461 CmpConstants(unsigned CmpOpcode, unsigned FlagsOpcode, unsigned SelectOpcode, unsigned OpRegBank, unsigned OpSize) argument
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| /freebsd-12-stable/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | X86RecognizableInstr.cpp | 363 handleOperand(bool optional, unsigned &operandIndex, unsigned &physicalOperandIndex, unsigned numPhysicalOperands, const unsigned *operandMapping, OperandEncoding (*encodingFromString) (const std::string&, uint8_t OpSize)) argument
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| H A D | X86RecognizableInstr.h | 171 uint8_t OpSize; member in class:llvm::X86Disassembler::RecognizableInstr
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Metadata.cpp | 481 size_t OpSize = NumOps * sizeof(MDOperand); local
496 size_t OpSize = N->NumOperands * sizeof(MDOperand); local
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 542 unsigned OpSize = OpTy.getSizeInBits(); local
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| H A D | LegalizerHelper.cpp | 3517 uint64_t OpSize = MRI.getType(OpReg).getSizeInBits(); local
3584 uint64_t OpSize = MRI.getType(OpReg).getSizeInBits(); local
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetInstrInfo.cpp | 556 int64_t OpSize = MFI.getObjectSize(FI); local
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| /freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | TargetTransformInfoImpl.h | 76 unsigned OpSize = OpTy->getScalarSizeInBits(); local
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ConstantFolding.cpp | 751 unsigned OpSize = DL.getTypeSizeInBits(Op0->getType()); local
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 844 unsigned OpSize = OpTy.getSizeInBits(); local
3011 unsigned OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); local
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| H A D | SIISelLowering.cpp | 2834 unsigned OpSize = Flags.isByVal() ? local
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstructionSelector.cpp | 878 unsigned OpSize local
476 selectBinaryOp(unsigned GenericOpc, unsigned RegBankID, unsigned OpSize) argument
547 selectLoadStoreUIOp(unsigned GenericOpc, unsigned RegBankID, unsigned OpSize) argument
1965 const unsigned OpSize = Ty.getSizeInBits(); local
1991 unsigned OpSize = Ty.getSizeInBits(); local
[all...] |
| H A D | AArch64ISelLowering.cpp | 4147 unsigned OpSize = Flags.isByVal() ? Flags.getByValSize() * 8 local
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 2752 auto OpSize = AMDGPU::getOperandSize(Desc, OpIdx); local
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 4902 uint32_t OpSize = (Arg.getValueSizeInBits() + 7) / 8; local
12338 auto OpSize = N->getOperand(0).getValueSizeInBits(); local
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