| /freebsd-10.2-release/contrib/llvm/include/llvm/Analysis/ |
| H A D | ConstantsScanner.h | 28 unsigned OpIdx; // Operand index member in class:llvm::constant_iterator
[all...] |
| /freebsd-10.2-release/contrib/llvm/utils/TableGen/ |
| H A D | CodeEmitterGen.cpp | 130 unsigned OpIdx; local
|
| H A D | CodeGenInstruction.cpp | 134 unsigned OpIdx; local
170 unsigned OpIdx = getOperandNamed(OpName); local
[all...] |
| /freebsd-10.2-release/contrib/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 48 unsigned getOffsetUImm12OpValue(const MCInst &MI, unsigned OpIdx, argument
157 getOffsetUImm12OpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, int MemSize) const argument
243 getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
276 getAdrpLabelOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
311 getBitfield32LSLOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
321 getBitfield64LSLOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
371 getLabelOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
384 getLoadLitLabelOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
423 getMoveWideImmOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
[all...] |
| /freebsd-10.2-release/contrib/llvm/include/llvm/CodeGen/ |
| H A D | ScheduleDAGInstrs.h | 49 int OpIdx; member in struct:llvm::PhysRegSUOper
|
| /freebsd-10.2-release/contrib/llvm/lib/Target/R600/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 118 unsigned OpIdx = Desc.getNumDefs() + OpNo; local
|
| /freebsd-10.2-release/contrib/llvm/lib/CodeGen/ |
| H A D | ExecutionDepsFix.cpp | 466 bool ExeDepsFix::shouldBreakDependence(MachineInstr *MI, unsigned OpIdx, argument
556 unsigned OpIdx = UndefReads.back().second; local
|
| H A D | MachineLICM.cpp | 779 getRegisterClassIDAndCost(const MachineInstr *MI, unsigned Reg, unsigned OpIdx, unsigned &RCId, unsigned &RCCost) const argument
|
| H A D | MachineInstr.cpp | 922 int MachineInstr::findInlineAsmFlagIdx(unsigned OpIdx, argument
1674 unsigned OpIdx = DeadOps.back(); local
1739 unsigned OpIdx = DeadOps.back(); local
[all...] |
| H A D | RegisterCoalescer.cpp | 657 unsigned OpIdx = NewMI->findRegisterUseOperandIdx(IntA.reg, false); local
|
| /freebsd-10.2-release/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMExpandPseudoInsts.cpp | 387 unsigned OpIdx = 0; local
452 unsigned OpIdx = 0; local
504 unsigned OpIdx = 0; local
587 unsigned OpIdx = 0; local
978 unsigned OpIdx = 0; local
1009 unsigned OpIdx = 0; local
1041 unsigned OpIdx = 0; local
[all...] |
| H A D | ARMCodeEmitter.cpp | 928 getMachineSoRegOpValue(const MachineInstr &MI, const MCInstrDesc &MCID, const MachineOperand &MO, unsigned OpIdx) argument
1024 unsigned OpIdx = 0; local
1126 unsigned OpIdx = 0; local
1197 unsigned OpIdx = 0; local
1282 unsigned OpIdx = 0; local
[all...] |
| H A D | ARMBaseInstrInfo.cpp | 2561 unsigned OpIdx = Commute ? 2 : 1; local
|
| /freebsd-10.2-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 168 getLdStmModeOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
446 EncodeAddrModeOpValues(const MCInst &MI, unsigned OpIdx, unsigned &Reg, unsigned &Imm, SmallVectorImpl<MCFixup> &Fixups) const argument
474 getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, unsigned FixupKind, SmallVectorImpl<MCFixup> &Fixups) argument
511 getThumbBLTargetOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
523 getThumbBLXTargetOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
534 getThumbBRTargetOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
545 getThumbBCCTargetOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
556 getThumbCBTargetOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
584 getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
597 getARMBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
612 getARMBLTargetOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
626 getARMBLXTargetOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
638 getUnconditionalBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
667 getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
707 getT2AdrLabelOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
726 getThumbAdrLabelOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
738 getThumbAddrModeRegRegOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &) const argument
752 getAddrModeImm12OpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
803 getT2Imm8s4OpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
834 getT2AddrModeImm8s4OpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
874 getT2AddrModeImm0_1020s4OpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
899 getHiLo16ImmOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
958 getLdStSORegOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
991 getAddrMode2OpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
1005 getAddrMode2OffsetOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
1027 getPostIdxRegOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
1038 getAddrMode3OffsetOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
1057 getAddrMode3OpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
1093 getAddrModeThumbSPOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
1108 getAddrModeISOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
1122 getAddrModePCOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
1132 getAddrMode5OpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
1170 getSORegRegOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
1217 getSORegImmOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const argument
[all...] |
| /freebsd-10.2-release/contrib/llvm/include/llvm/Support/ |
| H A D | PatternMatch.h | 1026 Argument_match(unsigned OpIdx, const Opnd_t &V) : OpI(OpIdx), Val(V) { } argument
|
| /freebsd-10.2-release/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 17117 int OpIdx = -1; local
5107 isShuffleMaskConsecutive(ShuffleVectorSDNode *SVOp, unsigned MaskI, unsigned MaskE, unsigned OpIdx, unsigned NumElems, unsigned &OpNum) argument
|