| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandImm.h | 24 uint64_t Op1; member in struct:llvm::AArch64_IMM::ImmInsnModel
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| H A D | SVEIntrinsicOpts.cpp | 289 IntrinsicInst *Op1 = dyn_cast<IntrinsicInst>(I->getArgOperand(0)); local
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| H A D | OverflowInstAnalysis.cpp | 22 bool llvm::isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, bool IsAnd, argument
68 bool llvm::isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, argument
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblySelectionDAGInfo.cpp | 36 EmitTargetCodeForMemmove( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, Align Alignment, bool IsVolatile, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
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| H A D | WebAssemblyPeephole.cpp | 156 MachineOperand &Op1 = MI.getOperand(1); local
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| H A D | WebAssemblyMemIntrinsicResults.cpp | 154 MachineOperand &Op1 = MI.getOperand(1); local
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelDAGToDAG.cpp | 253 SDValue Op0, Op1, AluOp; local
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| H A D | LanaiMemAluCombiner.cpp | 170 bool isSameOperand(const MachineOperand &Op1, const MachineOperand &Op2) { argument
293 MachineOperand &Op1 = AluIter->getOperand(1); local
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiMCCodeEmitter.cpp | 189 const MCOperand Op1 = Inst.getOperand(OpNo + 0); local
221 const MCOperand Op1 = Inst.getOperand(OpNo + 0); local
260 const MCOperand Op1 = Inst.getOperand(OpNo + 0); local
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| H A D | BPFAdjustOpt.cpp | 120 Value *Op0, *Op1; local
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| H A D | BPFMISimplifyPatchable.cpp | 94 const MachineOperand *Op1 = &Inst->getOperand(1); local
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGAddressAnalysis.cpp | 86 computeAliasing(const SDNode *Op0, const Optional<int64_t> NumBytes0, const SDNode *Op1, const Optional<int64_t> NumBytes1, const SelectionDAG &DAG, bool &IsAlias) argument
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/BPF/MCTargetDesc/ |
| H A D | BPFMCCodeEmitter.cpp | 169 const MCOperand Op1 = MI.getOperand(MemOpStartIndex); local
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCMacroFusion.cpp | 70 const MachineOperand &Op1 = FirstMI.getOperand(FirstMIOpIndex); local
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZTDC.cpp | 296 Value *Op0, *Op1; local
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/ |
| H A D | BypassSlowDivision.cpp | 203 Value *Op1 = I->getOperand(1); local
[all...] |
| /netbsd-current/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGTargetInfo.h | 51 EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, Align Alignment, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
67 EmitTargetCodeForMemmove( SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, Align Alignment, bool isVolatile, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
80 EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, Align Alignment, bool isVolatile, MachinePointerInfo DstPtrInfo) const argument
93 EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const argument
130 EmitTargetCodeForStrcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const argument
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86RegisterBankInfo.cpp | 214 auto &Op1 = MI.getOperand(1); local
243 auto &Op1 = MI.getOperand(1); local
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Sparc/MCTargetDesc/ |
| H A D | SparcInstPrinter.cpp | 152 const MCOperand &Op1 = MI->getOperand(opNum); local
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | DFAPacketizer.cpp | 282 bool VLIWPacketizerList::alias(const MachineMemOperand &Op1, argument
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.cpp | 157 uint32_t Op1 = (Bits >> 11) & 0x7; local
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
| H A D | ConstraintElimination.cpp | 57 Value *Op0, *Op1; local
100 Value *Op1; local
128 getConstraint(CmpInst::Predicate Pred, Value *Op0, Value *Op1, const DenseMap<Value *, unsigned> &Value2Index, DenseMap<Value *, unsigned> &NewIndices) argument
287 Value *Op0, *Op1; local
[all...] |
| /netbsd-current/external/apache2/llvm/dist/llvm/lib/ExecutionEngine/Interpreter/ |
| H A D | Execution.cpp | 2065 GenericValue Op1 = getOperandValue(CE->getOperand(1), SF); local
[all...] |
| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelDAGToDAG.cpp | 284 SDValue Op0, Op1; local
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcISelDAGToDAG.cpp | 380 SDValue Op0, Op1; local
|