| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegBankCombiner.cpp | 108 matchIntMinMaxToMed3( MachineInstr &MI, Med3MatchInfo &MatchInfo) argument
134 applyMed3(MachineInstr &MI, Med3MatchInfo &MatchInfo) argument
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| H A D | AMDGPUPreLegalizerCombiner.cpp | 57 matchClampI64ToI16( MachineInstr &MI, MachineRegisterInfo &MRI, MachineFunction &MF, ClampI64ToI16MatchInfo &MatchInfo) argument
118 applyClampI64ToI16( MachineInstr &MI, const ClampI64ToI16MatchInfo &MatchInfo) argument
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| H A D | AMDGPUPostLegalizerCombiner.cpp | 204 matchCvtF32UByteN( MachineInstr &MI, CvtF32UByteMatchInfo &MatchInfo) argument
232 applyCvtF32UByteN( MachineInstr &MI, const CvtF32UByteMatchInfo &MatchInfo) argument
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 50 matchExtractVecEltPairwiseAdd( MachineInstr &MI, MachineRegisterInfo &MRI, std::tuple<unsigned, LLT, Register> &MatchInfo) argument
93 applyExtractVecEltPairwiseAdd( MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, std::tuple<unsigned, LLT, Register> &MatchInfo) argument
244 matchBitfieldExtractFromSExtInReg( MachineInstr &MI, MachineRegisterInfo &MRI, std::function<void(MachineIRBuilder &)> &MatchInfo) argument
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| H A D | AArch64PostLegalizerLowering.cpp | 218 matchREV(MachineInstr &MI, MachineRegisterInfo &MRI, ShuffleVectorPseudo &MatchInfo) argument
247 matchTRN(MachineInstr &MI, MachineRegisterInfo &MRI, ShuffleVectorPseudo &MatchInfo) argument
268 matchUZP(MachineInstr &MI, MachineRegisterInfo &MRI, ShuffleVectorPseudo &MatchInfo) argument
284 matchZip(MachineInstr &MI, MachineRegisterInfo &MRI, ShuffleVectorPseudo &MatchInfo) argument
301 matchDupFromInsertVectorElt(int Lane, MachineInstr &MI, MachineRegisterInfo &MRI, ShuffleVectorPseudo &MatchInfo) argument
340 matchDupFromBuildVector(int Lane, MachineInstr &MI, MachineRegisterInfo &MRI, ShuffleVectorPseudo &MatchInfo) argument
356 matchDup(MachineInstr &MI, MachineRegisterInfo &MRI, ShuffleVectorPseudo &MatchInfo) argument
373 matchEXT(MachineInstr &MI, MachineRegisterInfo &MRI, ShuffleVectorPseudo &MatchInfo) argument
396 applyShuffleVectorPseudo(MachineInstr &MI, ShuffleVectorPseudo &MatchInfo) argument
407 applyEXT(MachineInstr &MI, ShuffleVectorPseudo &MatchInfo) argument
429 matchINS(MachineInstr &MI, MachineRegisterInfo &MRI, std::tuple<Register, int, Register, int> &MatchInfo) argument
456 applyINS(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &Builder, std::tuple<Register, int, Register, int> &MatchInfo) argument
616 matchAdjustICmpImmAndPred( MachineInstr &MI, const MachineRegisterInfo &MRI, std::pair<uint64_t, CmpInst::Predicate> &MatchInfo) argument
629 applyAdjustICmpImmAndPred( MachineInstr &MI, std::pair<uint64_t, CmpInst::Predicate> &MatchInfo, MachineIRBuilder &MIB, GISelChangeObserver &Observer) argument
644 matchDupLane(MachineInstr &MI, MachineRegisterInfo &MRI, std::pair<unsigned, int> &MatchInfo) argument
696 applyDupLane(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, std::pair<unsigned, int> &MatchInfo) argument
[all...] |
| /netbsd-current/external/apache2/llvm/dist/llvm/lib/FileCheck/ |
| H A D | FileCheck.cpp | 1289 SmallVector<StringRef, 4> MatchInfo; local
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| /netbsd-current/external/public-domain/sqlite/dist/ |
| H A D | sqlite3.c | 200776 typedef struct MatchInfo MatchInfo; typedef in typeref:struct:MatchInfo
200777 struct MatchInfo { struct
[all...] |