/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsCallLowering.h | 28 MipsHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) argument 42 MachineIRBuilder &MIRBuilder; member in class:llvm::MipsCallLowering::MipsHandler
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H A D | MipsLegalizerInfo.cpp | 259 legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, GISelChangeObserver &Observer) const argument 317 SelectMSA3OpIntrinsic(MachineInstr &MI, unsigned Opcode, MachineIRBuilder &MIRBuilder, const MipsSubtarget &ST) argument 332 MSA3OpIntrinsicToGeneric(MachineInstr &MI, unsigned Opcode, MachineIRBuilder &MIRBuilder, const MipsSubtarget &ST) argument 344 MSA2OpIntrinsicToGeneric(MachineInstr &MI, unsigned Opcode, MachineIRBuilder &MIRBuilder, const MipsSubtarget &ST) argument [all...] |
H A D | MipsCallLowering.cpp | 92 IncomingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) argument 122 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, argument 227 OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, MachineInstrBuilder &MIB) argument 413 lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef<Register> VRegs) const argument 453 lowerFormalArguments( MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef<ArrayRef<Register>> VRegs) const argument 537 lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const argument [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVCallLowering.cpp | 24 bool RISCVCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, argument 47 bool RISCVCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, argument 37 lowerFormalArguments( MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef<ArrayRef<Register>> VRegs) const argument
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/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.h | 93 MachineIRBuilder &MIRBuilder; member in class:llvm::LegalizerHelper
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H A D | CallLowering.h | 113 ValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, argument 163 MachineIRBuilder &MIRBuilder; member in struct:llvm::CallLowering::ValueHandler 264 virtual bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, argument 276 lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef<Register> VRegs) const argument 291 lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef<ArrayRef<Register>> VRegs) const argument 302 lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const argument [all...] |
H A D | RegBankSelect.h | 507 MachineIRBuilder MIRBuilder; member in class:llvm::RegBankSelect
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H A D | IRTranslator.h | 272 translateICmp(const User &U, MachineIRBuilder &MIRBuilder) argument 277 translateFCmp(const User &U, MachineIRBuilder &MIRBuilder) argument 353 translateAdd(const User &U, MachineIRBuilder &MIRBuilder) argument 356 translateSub(const User &U, MachineIRBuilder &MIRBuilder) argument 359 translateAnd(const User &U, MachineIRBuilder &MIRBuilder) argument 362 translateMul(const User &U, MachineIRBuilder &MIRBuilder) argument 365 translateOr(const User &U, MachineIRBuilder &MIRBuilder) argument 368 translateXor(const User &U, MachineIRBuilder &MIRBuilder) argument 372 translateUDiv(const User &U, MachineIRBuilder &MIRBuilder) argument 375 translateSDiv(const User &U, MachineIRBuilder &MIRBuilder) argument 378 translateURem(const User &U, MachineIRBuilder &MIRBuilder) argument 381 translateSRem(const User &U, MachineIRBuilder &MIRBuilder) argument 384 translateIntToPtr(const User &U, MachineIRBuilder &MIRBuilder) argument 387 translatePtrToInt(const User &U, MachineIRBuilder &MIRBuilder) argument 390 translateTrunc(const User &U, MachineIRBuilder &MIRBuilder) argument 393 translateFPTrunc(const User &U, MachineIRBuilder &MIRBuilder) argument 396 translateFPExt(const User &U, MachineIRBuilder &MIRBuilder) argument 399 translateFPToUI(const User &U, MachineIRBuilder &MIRBuilder) argument 402 translateFPToSI(const User &U, MachineIRBuilder &MIRBuilder) argument 405 translateUIToFP(const User &U, MachineIRBuilder &MIRBuilder) argument 408 translateSIToFP(const User &U, MachineIRBuilder &MIRBuilder) argument 411 translateUnreachable(const User &U, MachineIRBuilder &MIRBuilder) argument 414 translateSExt(const User &U, MachineIRBuilder &MIRBuilder) argument 418 translateZExt(const User &U, MachineIRBuilder &MIRBuilder) argument 422 translateShl(const User &U, MachineIRBuilder &MIRBuilder) argument 425 translateLShr(const User &U, MachineIRBuilder &MIRBuilder) argument 428 translateAShr(const User &U, MachineIRBuilder &MIRBuilder) argument 432 translateFAdd(const User &U, MachineIRBuilder &MIRBuilder) argument 435 translateFMul(const User &U, MachineIRBuilder &MIRBuilder) argument 438 translateFDiv(const User &U, MachineIRBuilder &MIRBuilder) argument 441 translateFRem(const User &U, MachineIRBuilder &MIRBuilder) argument 459 translateResume(const User &U, MachineIRBuilder &MIRBuilder) argument 462 translateCleanupRet(const User &U, MachineIRBuilder &MIRBuilder) argument 465 translateCatchRet(const User &U, MachineIRBuilder &MIRBuilder) argument 468 translateCatchSwitch(const User &U, MachineIRBuilder &MIRBuilder) argument 471 translateAddrSpaceCast(const User &U, MachineIRBuilder &MIRBuilder) argument 474 translateCleanupPad(const User &U, MachineIRBuilder &MIRBuilder) argument 477 translateCatchPad(const User &U, MachineIRBuilder &MIRBuilder) argument 480 translateUserOp1(const User &U, MachineIRBuilder &MIRBuilder) argument 483 translateUserOp2(const User &U, MachineIRBuilder &MIRBuilder) argument 486 translateFreeze(const User &U, MachineIRBuilder &MIRBuilder) argument [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | Legalizer.cpp | 291 std::unique_ptr<MachineIRBuilder> MIRBuilder; local 144 legalizeMachineFunction(MachineFunction &MF, const LegalizerInfo &LI, ArrayRef<GISelChangeObserver *> AuxObservers, MachineIRBuilder &MIRBuilder) argument [all...] |
H A D | CallLowering.cpp | 32 bool CallLowering::lowerCall(MachineIRBuilder &MIRBuilder, ImmutableCallSite CS, argument 171 handleAssignments(MachineIRBuilder &MIRBuilder, SmallVectorImpl<ArgInfo> &Args, ValueHandler &Handler) const argument 181 handleAssignments(CCState &CCInfo, SmallVectorImpl<CCValAssign> &ArgLocs, MachineIRBuilder &MIRBuilder, SmallVectorImpl<ArgInfo> &Args, ValueHandler &Handler) const argument [all...] |
H A D | LegalizerInfo.cpp | 522 legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, GISelChangeObserver &Observer) const argument
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H A D | IRTranslator.cpp | 307 bool IRTranslator::translateFSub(const User &U, MachineIRBuilder &MIRBuilder) { argument 325 bool IRTranslator::translateFNeg(const User &U, MachineIRBuilder &MIRBuilder) { argument 288 translateBinaryOp(unsigned Opcode, const User &U, MachineIRBuilder &MIRBuilder) argument 337 translateCompare(const User &U, MachineIRBuilder &MIRBuilder) argument 363 translateRet(const User &U, MachineIRBuilder &MIRBuilder) argument 385 translateBr(const User &U, MachineIRBuilder &MIRBuilder) argument 837 translateIndirectBr(const User &U, MachineIRBuilder &MIRBuilder) argument 860 translateLoad(const User &U, MachineIRBuilder &MIRBuilder) argument 905 translateStore(const User &U, MachineIRBuilder &MIRBuilder) argument 971 translateExtractValue(const User &U, MachineIRBuilder &MIRBuilder) argument 986 translateInsertValue(const User &U, MachineIRBuilder &MIRBuilder) argument 1006 translateSelect(const User &U, MachineIRBuilder &MIRBuilder) argument 1026 translateBitCast(const User &U, MachineIRBuilder &MIRBuilder) argument 1046 translateCast(unsigned Opcode, const User &U, MachineIRBuilder &MIRBuilder) argument 1054 translateGetElementPtr(const User &U, MachineIRBuilder &MIRBuilder) argument 1123 translateMemFunc(const CallInst &CI, MachineIRBuilder &MIRBuilder, Intrinsic::ID ID) argument 1170 getStackGuard(Register DstReg, MachineIRBuilder &MIRBuilder) argument 1191 translateOverflowIntrinsic(const CallInst &CI, unsigned Op, MachineIRBuilder &MIRBuilder) argument 1265 translateSimpleIntrinsic(const CallInst &CI, Intrinsic::ID ID, MachineIRBuilder &MIRBuilder) argument 1285 translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID, MachineIRBuilder &MIRBuilder) argument 1455 getStackGuard(getOrCreateVReg(CI), MIRBuilder); local 1540 translateInlineAsm(const CallInst &CI, MachineIRBuilder &MIRBuilder) argument 1559 translateCallSite(const ImmutableCallSite &CS, MachineIRBuilder &MIRBuilder) argument 1599 translateCall(const User &U, MachineIRBuilder &MIRBuilder) argument 1686 translateInvoke(const User &U, MachineIRBuilder &MIRBuilder) argument 1737 translateCallBr(const User &U, MachineIRBuilder &MIRBuilder) argument 1743 translateLandingPad(const User &U, MachineIRBuilder &MIRBuilder) argument 1801 translateAlloca(const User &U, MachineIRBuilder &MIRBuilder) argument 1861 translateVAArg(const User &U, MachineIRBuilder &MIRBuilder) argument 1873 translateInsertElement(const User &U, MachineIRBuilder &MIRBuilder) argument 1897 translateExtractElement(const User &U, MachineIRBuilder &MIRBuilder) argument 1934 translateShuffleVector(const User &U, MachineIRBuilder &MIRBuilder) argument 1947 translatePHI(const User &U, MachineIRBuilder &MIRBuilder) argument 1960 translateAtomicCmpXchg(const User &U, MachineIRBuilder &MIRBuilder) argument 1994 translateAtomicRMW(const User &U, MachineIRBuilder &MIRBuilder) argument 2065 translateFence(const User &U, MachineIRBuilder &MIRBuilder) argument [all...] |
H A D | LegalizerHelper.cpp | 360 createLibcall(MachineIRBuilder &MIRBuilder, RTLIB::Libcall Libcall, const CallLowering::ArgInfo &Result, ArrayRef<CallLowering::ArgInfo> Args) argument 380 simpleLibcall(MachineInstr &MI, MachineIRBuilder &MIRBuilder, unsigned Size, Type *OpType) argument 392 createMemLibcall(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, MachineInstr &MI) argument 482 conversionLibcall(MachineInstr &MI, MachineIRBuilder &MIRBuilder, Type *ToType, Type *FromType) argument [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMLegalizerInfo.cpp | 360 legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, GISelChangeObserver &Observer) const argument [all...] |
H A D | ARMCallLowering.cpp | 89 OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, argument 237 lowerReturnVal(MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef<Register> VRegs, MachineInstrBuilder &Ret) const argument 265 lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef<Register> VRegs) const argument 286 IncomingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, CCAssignFn AssignFn) argument 416 lowerFormalArguments( MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef<ArrayRef<Register>> VRegs) const argument 474 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, MachineInstrBuilder MIB, CCAssignFn *AssignFn) argument 503 lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const argument [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64LegalizerInfo.cpp | 620 legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, GISelChangeObserver &Observer) const argument 660 legalizeShlAshrLshr( MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, GISelChangeObserver &Observer) const argument 684 legalizeLoadStore( MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, GISelChangeObserver &Observer) const argument [all...] |
H A D | AArch64CallLowering.cpp | 56 IncomingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, argument 108 FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, CCAssignFn *AssignFn) argument 119 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, MachineInstrBuilder MIB, CCAssignFn *AssignFn) argument 131 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, MachineInstrBuilder MIB, CCAssignFn *AssignFn, CCAssignFn *AssignFnVarArg, bool IsTailCall = false, int FPDiff = 0) argument 256 lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef<Register> VRegs, Register SwiftErrorVReg) const argument 376 handleMustTailForwardedRegisters(MachineIRBuilder &MIRBuilder, CCAssignFn *AssignFn) argument 416 lowerFormalArguments( MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef<ArrayRef<Register>> VRegs) const argument 660 isEligibleForTailCallOptimization( MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info, SmallVectorImpl<ArgInfo> &InArgs, SmallVectorImpl<ArgInfo> &OutArgs) const argument 778 lowerTailCall( MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info, SmallVectorImpl<ArgInfo> &OutArgs) const argument 921 lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const argument [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86CallLowering.cpp | 99 OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, argument 187 lowerReturn( MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef<Register> VRegs) const argument 230 IncomingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, CCAssignFn *AssignFn) argument 302 FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, CCAssignFn *AssignFn) argument 313 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, CCAssignFn *AssignFn, MachineInstrBuilder &MIB) argument 327 lowerFormalArguments( MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef<ArrayRef<Register>> VRegs) const argument 378 lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const argument [all...] |